ROTARY FLASH ADC

• US 20070176816A1
• Filed: 04/03/2007
• Published: 08/02/2007
• Est. Priority Date: 07/27/2004
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Multigig, Inc. (Analog Devices, Inc.)
• Inventors: WOOD, John
• Granted Patent: US 7,656,336 B2
• Time in Patent Office: Days
• US Class Current: 341/155
• CPC Class Codes: G04F 10/005 Time-to-digital converters [TDC] analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60
• CPC Class Codes: G11C 27/024 using a capacitive memory element G11C27/04 takes precedence
• CPC Class Codes: G11C 27/026 associated with an amplifier G11C27/028 takes precedence
• CPC Class Codes: H03M 1/1004 without interrupting normal operation, e.g. by providing an additional component for temporarily replacing components to be tested or calibrated H03M1/1009, H03M1/1071 take precedence
• CPC Class Codes: H03M 1/145 the steps being performed sequentially in series-connected stages H03M1/141, H03M1/143, H03M1/16 take precedence
• CPC Class Codes: H03M 1/502 using tapped delay lines
• CPC Class Codes: H03M 1/504 using pulse width modulation
• CPC Class Codes: H03M 1/54 Input signal sampled and held with linear return to datum

Abstract

A system and method for converting an analog signal to a digital signal is disclosed. The system includes a multiphase oscillator preferable a rotary oscillator, a sample and hold circuit, an integrator and a time-to-digital converter. The multiphase oscillator has a plurality of phases that are used in the time-to-digital converter to measure the time of a pulse created by the integrator. The edges of the pulse may optionally be sharpened by passing the pulse through a non-linear transmission line to improve the accuracy of the measurement process. To cut down on noise a tuned power network provides power to the switching devices of the rotary oscillator. Calibration is performed by fragmenting the sample and hold circuit and integrator and performing a closed loop calibration cycle on one of the fragments while the other fragments are joined together for the normal operation of the sample and hold and integrator circuits.

Claims

1. A system for converting an analog signal to a digital signal, the system comprising:

a multiphase oscillator having a period of oscillation and providing a plurality of phase signals, each oscillating at the period of the multiphase oscillator;

a sample and hold circuit for capturing and holding the analog signal in response to a phase signal of the multiphase oscillator;

an integrator for converting the held analog signal into a pulse having a duration that is proportional to the magnitude of the analog signal; and

a time-to-digital converter for converting the pulse into a digital signal, the time to digital converter including a plurality of sampling elements, each activated by the pulse and capturing one of the phases of the multiphase oscillator, and a binary counter for counting the periods of the multiphase oscillator;

wherein the plurality of flip-flops and the binary counter provide the digital signal.

2. A system for converting as recited in claim 1, wherein the plurality of sampling elements hold a thermometer code whose bits give the least significant bits of the digital signal.

3. A system for converting as recited in claim 1, wherein the binary counter has bits that give the most significant bits of the digital signal.

4. A system for converting as recited in claim 1, wherein the multiphase oscillator is a rotary oscillator.

5. A system for converting as recited in claim 1, further comprising an edge sharpening circuit connected between the integrator and the time-to-digital converter to improve the transition speed of the pulse.

6. A system for converting as recited in claim 5, wherein the edge sharpening circuit includes a non-linear transmission line that sharpens the edges of the pulse as the pulse traverses the line.

7. A system for converting as recited in claim 1,

wherein the sample and hold circuit is formed from a plurality of sample and hold fragments;

wherein the integrator is formed from a plurality of corresponding integrator fragments; and

further comprising a calibration circuit for calibrating the converter during the operation of the converter, the calibration circuit calibrating one of the plurality of sample and hold and corresponding integrator fragments while the other sample and hold and corresponding integrator fragments are used in the operation of the sample and hold circuit.

8. A system for converting as recited in claim 7,

wherein each of the fragments has at least one trim input signal;

wherein the calibration circuit includes;

a controller connected to receive timing signals from the multiphase oscillator and operative to provide multiplexer control signals, fragment selection signals, and fragment join signals, the selection signals selecting one of the fragments for calibration and the join signals connecting together non-selected fragments for operation of the converter;

a multiplexer connected to the controller to receive the multiplexer control signals and an error signal, the multiplexer providing a plurality of trim input signals to the fragments based on the multiplexer control signals and the error signal; and

a phase frequency detector that receives the pulse output of the integrator and a reference signal, the phase frequency detector being operative to compare the pulse output of the integrator with the reference signal to provide the error signal to the multiplexer.

9. A system for converting as recited in claim 1,

wherein the multiphase oscillator is a rotary oscillator with switching elements that maintain a traveling wave on the oscillator;

and

further comprising a power network for supplying power to the switching elements of the rotary oscillator, the power network having the form of a loop and a rotation time that is approximately one-half the oscillation period of the rotary oscillator so as to prevent the power network from supplying of power to the rotary oscillator at the second harmonic of the frequency of the rotary oscillator.

10. A system for converting as recited in claim 9, wherein the power network is a Mobius power network and has at least one power insertion point.

11. A system for converting as recited in claim 9, wherein the power network is a non-Mobius power network and has at least one power insertion point.

12. A system for converting as recited in claim 9, wherein the rotation time of the power network is slightly offset from being one-half the oscillation period of the rotary oscillator so as to improve impulse-sensitivity function immunity.

13. A method for converting an analog signal to a digital signal, the method comprising:

sampling and holding the analog signal in response to one of a number of phase signals of a multiphase oscillator; and

after holding the analog signal, creating a first transition of a pulse, integrating a constant reference current until the hold analog signal has a known voltage value to create a second transition of the pulse, and between the first and second transitions of the pulse, counting oscillator cycles and capturing the state of the oscillator phase signals, wherein the count of the oscillator cycles and the captured state of oscillator phase signals become the digital signal.

14. A method for converting as recited in claim 13, wherein the captured state of the oscillator phase signals has the form of a thermometer code.

15. A method for converting as recited in claim 13, further comprising decreasing the transition time for the first and second transitions of the pulse.

16. A method for converting as recited in claim 13, performing a calibration operation during the sampling and holding steps.

17. A method for converting as recited in claim 16,

wherein the steps of sampling and holding, and integrating are performed by circuitry composed of a plurality of fragments and each fragment has a trim input;

and

wherein performing the calibration operation includes selecting out one of the plurality of circuitry fragments for calibration, detecting an error between the circuitry fragment and a reference signal, and applying the error to the trim input of the circuitry fragment to reduce the error.