RFID ANTENNA ON MULTIPLE SIDES OF 3-D PACKAGING

• US 20070182559A1
• Filed: 09/15/2006
• Published: 08/09/2007
• Est. Priority Date: 09/15/2005
• Status: Abandoned Application

• Current Assignee: ZIH Corp. (Zebra Technologies Corporation)
• Original Assignee: ZIH Corp. (Zebra Technologies Corporation)
• Inventors: FEIN, MICHAEL, GAMOTA, DANIEL, ASHTON, KEVIN, LAWRENCE, DANIEL, SIDEN, JOHAN
• Application Number:
  US11/532,214
• Publication Number:
  US 20070182559A1
• Time in Patent Office: Days
• US Class Current: 340/572.700
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G08B 13/2417 having a radio frequency identification chip
• CPC Class Codes: G08B 13/2445 Tag integrated into item to be protected, e.g. source tagging
• CPC Class Codes: G08B 13/2474 Antenna or antenna activator geometry, arrangement or layout loop antennae H01Q1/22

Abstract

An RFID antenna is fabricated to operate in three dimensions. An antenna including a first conductive trace and at least one second conductive trace is formed on an unfolded packaging substrate having a first surface and at least one second surface. An integrated circuit is connected across the conductive traces. The unfolded packaging substrate is formed into a three-dimensional package having multiple sides. For example, the unfolded packaging substrate is folded into a cube-shaped container having six sides. The integrated circuit is formed on a first side, while portions of the first and second conductive traces may be formed on both the first side and at least one second side. In this manner, the antenna is three-dimensional and operable to more effectively communicate with a three-dimensional electromagnetic field.

Claims

1. An RFID system, comprising:

a packaging substrate that has a first surface and at least one second surface;

an antenna formed on the packaging substrate that includes a first conductive trace and at least one second conductive trace, wherein at least one of the conductive traces is formed on the first surface and the at least one second surface; and

an integrated circuit connected across the first conductive trace and the at least one second conductive trace on the first surface,

wherein the packaging substrate has an unfolded state wherein the first surface and the at least one second surface are substantially coplanar, and has a folded state wherein the first surface and the at least one second surface are not coplanar.

2. The RFID system of claim 1 further comprising at least one of an inductive loop and/or a capacitive load formed on the at least one second surface.

3. The RFID system of claim 1 wherein the antenna is formed on at least one of an internal surface and/or an external surface of the packaging substrate.

4. The RFID system of claim 1 wherein the integrated circuit is located proximate a border between the first surface and the at least one second surface.

5. The RFID system of claim 1 wherein the antenna is a full wavelength antenna.

6. An RFID system, comprising:

a packaging substrate having a first surface on a first plane and a second surface on a second plane;

an antenna formed on the packaging substrate that includes a first conductive trace and at least one second conductive trace; and

an integrated circuit that is connected across the first conductive trace and the at least one second conductive trace on the first surface, wherein at least one of the conductive traces extends outward from the integrated circuit and is formed on the first surface and the second surface.

7. A method of printing an RFID antenna operable to function in three dimensions, comprising:

forming an antenna that includes a first conductive trace and at least one second conductive trace on an unfolded packaging substrate having a first surface and at least one second surface;

connecting an integrated circuit across the first conductive trace and the at least one second conductive trace; and

forming the unfolded packaging substrate into a package wherein the first surface and the at least one second surface are not coplanar, and wherein the integrated circuit and portions of the first conductive trace and the at least one second conductive trace are formed on the first surface and a portion of at least one of the first and/or the at least one second conductive trace is formed on the at least one second surface.

8. The method of claim 7 wherein the step of forming includes folding the unfolded packaging substrate into a three-dimensional package.

9. The method of claim 7 wherein the integrated circuit and the first conductive trace and the at least one second conductive trace are formed on at least one of an internal and/or an external surface of the package.

10. The method of claim 7 further comprising forming at least one of an inductive loop and/or a capacitive load on the unfolded packaging substrate, wherein after performing the step of forming the unfolded packaging substrate into a package, said inductive loop and/or capacitive load is located on at least one of the first surface and/or the at least one second surface.

11. The method of claim 7 wherein the integrated circuit and portions of the first conductive trace and the at least one second conductive trace are formed on an internal surface of the package and a portion of at least one of the first conductive trace and/or the second conductive trace is formed on an external surface of the package.