Super trench MOSFET including buried source electrode and method of fabricating the same
First Claim
1. A trench-gate MOSFET comprising:
- a semiconductor substrate having first and second trenches formed at a first surface thereof, said first and second trenches forming a mesa therebetween, said mesa comprising;
a source region of a first conductivity type located adjacent said first and second trenches at said first surface;
a body region of a second conductivity type opposite to said first conductivity type adjacent said first and second trenches and forming a junction with said source region; and
a drift region of said first conductivity type located adjacent said first and second trenches and forming a junction with said body region, wherein said drift region has a substantially uniform doping concentration Nconst in a central portion of said drift region;
a drain region of said first conductivity type adjacent a second surface of said substrate opposite to said first surface, said drain region having a doping concentration greater than Nconst; and
a metal layer overlying said first surface of said substrate and being in electrical contact with said source region;
each of said first and second trenches comprising an upper portion comprising a gate electrode, said gate electrode being separated from said body region by a gate oxide layer; and
a lower portion comprising a buried source electrode, said buried source electrode being electrically isolated from said drift region by a second oxide layer and from said gate electrode by a third oxide layer, said buried source electrode being electrically connected to said source region;
wherein a width of said mesa, a width of said trench, and said doping concentration Nconst in said drift region are established such that said drift region is fully depleted at a drain-to-source voltage equal to Vds but is not fully depleted at a drain-to-source voltage of less than Vds; and
wherein a thickness of said second oxide layer in cm is approximately equal to 10−
7 times said voltage Vds in volts.
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Accused Products
Abstract
In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.
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Citations
42 Claims
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1. A trench-gate MOSFET comprising:
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a semiconductor substrate having first and second trenches formed at a first surface thereof, said first and second trenches forming a mesa therebetween, said mesa comprising;
a source region of a first conductivity type located adjacent said first and second trenches at said first surface;
a body region of a second conductivity type opposite to said first conductivity type adjacent said first and second trenches and forming a junction with said source region; and
a drift region of said first conductivity type located adjacent said first and second trenches and forming a junction with said body region, wherein said drift region has a substantially uniform doping concentration Nconst in a central portion of said drift region;
a drain region of said first conductivity type adjacent a second surface of said substrate opposite to said first surface, said drain region having a doping concentration greater than Nconst; and
a metal layer overlying said first surface of said substrate and being in electrical contact with said source region;
each of said first and second trenches comprising an upper portion comprising a gate electrode, said gate electrode being separated from said body region by a gate oxide layer; and
a lower portion comprising a buried source electrode, said buried source electrode being electrically isolated from said drift region by a second oxide layer and from said gate electrode by a third oxide layer, said buried source electrode being electrically connected to said source region;
wherein a width of said mesa, a width of said trench, and said doping concentration Nconst in said drift region are established such that said drift region is fully depleted at a drain-to-source voltage equal to Vds but is not fully depleted at a drain-to-source voltage of less than Vds; and
wherein a thickness of said second oxide layer in cm is approximately equal to 10−
7 times said voltage Vds in volts. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A trench-gate MOSFET comprising:
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a semiconductor substrate having a trench formed at a first surface;
a source region of a first conductivity type located adjacent said trench at said first surface;
a body region of a second conductivity type opposite to said first conductivity type adjacent said trench and forming a junction with said source region;
a drift region of said first conductivity type located adjacent said trench and forming a junction with said body region;
a drain region of said first conductivity type adjacent a second surface of said substrate opposite to said first surface; and
a metal layer overlying said first surface of said substrate and being in electrical contact with said source region;
said trench comprising an upper portion comprising a gate electrode, said gate electrode being separated from said body region by a gate oxide layer; and
a lower portion comprising a buried source electrode, said buried source electrode being electrically isolated from said drift region by a second oxide layer and from said gate electrode by a oxide layer, said buried source electrode being electrically connected to said source region, said second oxide layer being substantially thicker than said gate oxide layer;
wherein said third oxide layer wraps around an upper portion of said buried source electrode so as to create a vertical overlap between said gate electrode and said buried source electrode. - View Dependent Claims (14)
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15. A method of fabricating a MOSFET comprising:
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forming a trench at a first surface of a semiconductor substrate, said substrate comprising dopant of a first conductivity type;
depositing a mask layer over said first surface, said mask layer lining the walls and floor of said trench;
removing a portion of said mask layer adjacent the floor of said trench, remaining portions of said mask layer remaining attached to sidewalls of said trench;
etching said substrate through said bottom of said trench with said remaining portions of said mask layer remaining attached to sidewalls of said trench so as to form a cavity in said substrate;
heating said substrate with said remaining portions of said mask layer remaining attached to sidewalls of said trench so as to form a first dielectric layer in said cavity;
removing said remaining portions of said mask layer;
introducing a first layer of a conductive material into said cavity, said first layer of conductive material being electrically isolated from said substrate by said first dielectric layer;
heating said substrate so as form a second dielectric layer at an exposed surface of said conductive material and a gate dielectric layer along walls of said trench;
introducing a second layer of conductive material into said trench;
forming a body region of a second conductivity type opposite to said first conductivity type in said substrate, said body region abutting said gate dielectric layer;
forming a source region of said first conductivity type abutting said gate oxide layer and forming a junction with said body region;
covering said second layer of conductive material in said trench with a third dielectric layer;
depositing a metal layer over said substrate, said metal layer being in electrical contact with said source region and forming an electrical connection between said first layer of conductive material and said source region. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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22. A method of fabricating a MOSFET comprising:
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forming a trench at a first surface of a semiconductor substrate, said substrate comprising dopant of a first conductivity type;
forming a first dielectric layer on the walls and bottom of said trench;
depositing a first layer of a conductive material in a lower portion of said trench, leaving an exposed portion of said first dielectric layer on the walls of an upper portion of said trench, said first layer of conductive material being electrically isolated from said substrate by said first dielectric layer;
removing said exposed portion of said first dielectric layer and a portion of said first dielectric layer that is laterally adjacent an upper portion of said first layer of conductive material, thereby exposing portions of lateral surfaces of said first conductive layer;
forming a second dielectric layer on the walls of said upper portion of said trench and on a top surface and said exposed portions of lateral surfaces of said first conductive layer;
depositing a second conductive layer in said upper portion of said trench, said first and second conductive layers vertically overlapping;
forming a body region of a second conductivity type opposite to said first conductivity type in said substrate, said body region abutting said second dielectric layer;
forming a source region of said first conductivity type abutting said second dielectric layer and forming a junction with said body region;
covering said second conductive layer with a third dielectric layer;
depositing a metal layer over said substrate, said metal layer being in electrical contact with said source region; and
forming an electrical connection between said first conductive layer and said source region. - View Dependent Claims (23, 24, 25, 26)
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27-38. -38. (canceled)
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39. A trench-gate MOSFET comprising:
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a semiconductor substrate having a trench formed at a first surface;
a source region of a first conductivity type located adjacent said trench at said first surface;
a body region of a second conductivity type opposite to said first conductivity type adjacent said trench and forming a junction with said source region;
a drift region of said first conductivity type located adjacent said trench and forming a junction with said body region;
a drain region of said first conductivity type adjacent a second surface of said substrate opposite to said first surface; and
a metal layer overlying said first surface of said substrate and being in electrical contact with said source region;
said trench comprising a source electrode in electrical contact with said metal layer;
a thick oxide layer lining the floor and lower portions of the sidewalls of said trench;
a multilayer structure lining the upper portions of the sidewalls of said trench, said multilayer comprising a first thin oxide layer in contact with said semiconductor substrate, a second thin oxide layer in contact with said source electrode, and a polysilicon layer separating said first and second thin oxide layers. - View Dependent Claims (40, 41)
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42. A method of fabricating a MOSFET comprising:
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forming a trench at a first surface of a semiconductor substrate, said substrate comprising dopant of a first conductivity type;
forming a thick dielectric layer on the walls and bottom of said trench;
depositing a first layer of a conductive material in said trench, said first layer of conductive material being electrically isolated from said substrate by said first dielectric layer;
removing an upper portion of said thick dielectric layer, said upper portion being located between said source electrode and said substrate, thereby forming a cavity between said substrate and said source electrode;
forming a thin dielectric layer in said cavity, a first section of said thin dielectric layer abutting a wall of said trench, a second section of said thin dielectric layer abutting a wall of said source electrode;
depositing a second conductive layer in a space between said first and second thin dielectric layers;
forming a body region of a second conductivity type opposite to said first conductivity type in said substrate, said body region abutting said first section of said thin dielectric layer;
forming a source region of said first conductivity type abutting said first section of said thin dielectric layer and forming a junction with said body region;
covering said second conductive layer with a third dielectric layer; and
depositing a metal layer over said substrate, said metal layer being in electrical contact with said source region and said source electrode.
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Specification