Multi-processing system distributing workload optimally during operation
First Claim
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1. A multi-processing system with a plurality of processor chips that includes at least a first processor chip and a second processor chip operating at a first clock frequency and a second clock frequency, respectively, the multi-processing system comprising:
- an acquiring unit that acquires, from the first processor chip and the. second processor chip, first information on lot-to-lot variation of the first processor chip and second information on lot-to-lot variation of the second processor chip, respectively;
a selecting unit that selects a first selected clock frequency and a second selected clock frequency based on the first information and the second information, respectively;
a chip performance calculating unit that calculates a first chip performance of the first processor chip operating at the first selected clock frequency and a second chip performance of the second processor chip operating at the second selected clock frequency, respectively;
a system performance judging unit that judges whether a total of chip performance of the processor chips is equal to or higher than a predetermined system performance required for the multi-processing system; and
a setting unit that sets the first selected clock frequency and the second selected clock frequency as the first clock frequency and the second clock frequency, respectively, when the total is equal to or higher than the predetermined system performance.
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Abstract
A multi-processing system includes: a selecting unit that selects a clock frequency for each processor chips based on lot-to-lot variation thereof; a calculating unit that calculates chip performance of the processor chips operating at the clock frequencies; a judging unit that judges whether a total of chip performance of the processor chips is equal to or higher than a predetermined system performance; and a setting unit that sets the clock frequencies to the processor chips when the total is equal to or higher than the predetermined system performance.
58 Citations
13 Claims
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1. A multi-processing system with a plurality of processor chips that includes at least a first processor chip and a second processor chip operating at a first clock frequency and a second clock frequency, respectively, the multi-processing system comprising:
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an acquiring unit that acquires, from the first processor chip and the. second processor chip, first information on lot-to-lot variation of the first processor chip and second information on lot-to-lot variation of the second processor chip, respectively;
a selecting unit that selects a first selected clock frequency and a second selected clock frequency based on the first information and the second information, respectively;
a chip performance calculating unit that calculates a first chip performance of the first processor chip operating at the first selected clock frequency and a second chip performance of the second processor chip operating at the second selected clock frequency, respectively;
a system performance judging unit that judges whether a total of chip performance of the processor chips is equal to or higher than a predetermined system performance required for the multi-processing system; and
a setting unit that sets the first selected clock frequency and the second selected clock frequency as the first clock frequency and the second clock frequency, respectively, when the total is equal to or higher than the predetermined system performance. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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Current AssigneeFujitsu Limited
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Original AssigneeFujitsu Limited
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InventorsShiota, Tetsuyoshi
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Granted Patent
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Time in Patent OfficeDays
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Field of Search
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US Class Current713/600
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CPC Class CodesG06F 1/3203 Power management, i.e. even...G06F 1/324 by lowering clock frequencyG06F 1/3296 by lowering the supply or o...Y02D 10/00 Energy efficient computing,...
