System and method for a tunable impedance matching network

• US 20070194859A1
• Filed: 04/14/2006
• Published: 08/23/2007
• Est. Priority Date: 02/17/2006
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Seong, Zhu, Xu, Brobston, Michael
• Granted Patent: US 7,671,693 B2
• Time in Patent Office: Days
• US Class Current: 333/17.3
• CPC Class Codes: H03H 7/40 Automatic matching of load impedance to source impedance

Abstract

The present disclosure relates generally to tunable impedance matching networks and methods for the use of such networks. In one example, a method includes identifying state information about a mobile device, accessing a memory to identify a configuration of an impedance matching network based on the state information, and applying the values from the configuration to the impedance matching network.

Claims

1. A system comprising:

signaling circuitry coupled to an antenna and configured to receive a signal at a first frequency and transmit a signal at a second frequency;

impedance matching circuitry coupled to the signaling circuitry and having a plurality of tunable elements for matching an impedance of the first and second frequencies with an impedance of the antenna;

a memory containing a plurality of values associated with the tunable elements, wherein each value corresponds to a state of the signaling circuitry and is defined to configure the associated tunable element for impedance matching at both the first and second frequencies when the signaling circuitry is in the corresponding state; and

a controller configured to obtain a current state of the signaling circuitry, select the values from the memory that correspond to the current state, and apply the selected values to their associated tunable elements.

2. The system of claim 1 wherein the impedance matching circuitry includes a plurality of reactive series sections.

3. The system of claim 2 wherein the impedance matching circuitry can be configured to bypass at least one of the plurality of reactive series sections.

4. The system of claim 2 wherein the impedance matching circuitry is divided into a plurality of shunt sections and wherein the impedance matching circuitry can be configured to bypass at least one of the plurality of shunt sections.

5. The system of claim 1 wherein the plurality of values are organized as a data structure.

6. The system of claim 5 wherein the data structure is a look-up table with an index based on the current state of the signaling circuitry and wherein the current state includes a transmit return loss magnitude and phase.

7. The system of claim 6 wherein the look up table is further indexed based on a frequency band.

8. The system of claim 7 wherein the look up table is further indexed based on a frequency channel.

9. The system of claim 1 further comprising a terminal processor, wherein the controller is integrated with the terminal processor.

10. A circuit for use in a tunable matching network based on a pi network topology comprising:

a first reactive series section coupled to an input line, the first reactive series section having a first variable capacitor and a first fixed inductor coupled in parallel to the first variable capacitor;

a second reactive series section coupled to an antenna via an output line and coupled in series to the first reactive series section, the second reactive series section having a second variable capacitor and a second fixed inductor coupled in parallel to the second variable capacitor;

a third variable capacitor coupled between ground and the input line and first reactive series section; and

a fourth variable capacitor coupled between ground and the output line and second reactive series section.

11. The circuit of claim 10 further comprising a shunt switch positioned in parallel with one of the first or second variable capacitors to bypass the first or second reactive series section when actuated.

12. The circuit of claim 10 further comprising a first shunt switch positioned in parallel with the first variable capacitor and a second shunt switch positioned in parallel with the second variable capacitor, wherein the first and second shunt switches bypass the first and second reactive series section, respectively, when actuated.

13. The circuit of claim 12 wherein the first and second capacitors and first and second shunt switches are microelectromechanical system (MEMS) devices.

14. The circuit of claim 10 further comprising a fifth variable capacitor coupled between ground and a point between the first series reactive section and second series reactive section.

15. A look-up table for use by a controller in setting an impedance matching network in a mobile device comprising:

an index having a plurality of mobile device states; and

a plurality of configurations, each configuration associated with a particular mobile device state and containing pre-defined values for setting a plurality of tunable elements of the impedance matching network to simultaneously match a first frequency and a second frequency.

16. The look-up table of claim 15 wherein at least some of the plurality of mobile device states include a transmit return loss magnitude.

17. The look-up table of claim 15 at least some of the plurality of mobile device states include a transmit return loss phase.

18. The look-up table of claim 15 at least some of the plurality of mobile device states include a frequency band.

19. The look-up table of claim 15 at least some of the plurality of mobile device states include a frequency channel.

20. The look-up table of claim 15 wherein at least some of the values represent a setting for a variable capacitor.

21. The look-up table for claim 15 wherein at least some of the values represent a setting for a shunt switch.

22. A method for impedance matching in a mobile device comprising:

identifying state information about the mobile device;

accessing a memory to identify a configuration of an impedance matching network based on the state information, wherein the configuration includes values for simultaneously matching an impedance of transmitting circuitry operating at a first frequency with an impedance of an antenna and matching an impedance of receiving circuitry operating at a second frequency with an impedance of the antenna; and

applying the values from the configuration to the impedance matching network.

23. The method of claim 22 wherein identifying the state information includes identifying the first frequency.

24. The method of claim 22 wherein identifying the state information includes identifying a transmit return loss magnitude and phase.

25. The method of claim 22 wherein applying the values from the configuration includes setting a variable capacitor.

26. The method of claim 25 wherein applying the values from the configuration includes actuating a shunt switch to bypass a section of the impedance matching network.