Combining multi-layered bitmap files using network specific hardware

• US 20070195107A1
• Filed: 05/25/2006
• Published: 08/23/2007
• Est. Priority Date: 02/23/2006
• Status: Active Grant

• Current Assignee: TRIAD National Security, LLC
• Original Assignee: Los Alamos National Security LLC (Government of the United States of America)
• Inventors: DuBois, David, DuBois, Andrew, Davenport, Carolyn
• Granted Patent: US 8,125,486 B2
• Time in Patent Office: Days
• US Class Current: 345/589
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: H04N 21/2381 Adapting the multiplex stream to a specific network, e.g. an Internet Protocol [IP] network transmission of MPEG streams over ATM H04L12/5601
• CPC Class Codes: H04N 21/64322 IP

Abstract

Images and video can be produced by compositing or alpha blending a group of image layers or video layers. Increasing resolution or the number of layers results in increased computational demands. As such, the available computational resources limit the images and videos that can be produced. A computational architecture in which the image layers are packetized and streamed through processors can be easily scaled so to handle many image layers and high resolutions. The image layers are packetized to produce packet streams. The packets in the streams are received, placed in queues, and processed. For alpha blending, ingress queues receive the packetized image layers which are then z sorted and sent to egress queues. The egress queue packets are alpha blended to produce an output image or video.

Claims

1. A method comprising:

obtaining at least two packet streams comprising a multiplicity of packets wherein each packet comprises a packet number, a z value, and at least one pixel, and wherein each of the at least one pixel comprises an alpha value and at least one pixel value;

loading at least two ingress queues with the packets from the at least two packet streams;

taking the packets from the at least two ingress queues, sorting the packets based on z value to produce z sorted packets, and loading the z sorted packets into at least two egress queues; and

taking the z sorted packets from the at least two egress queues, and alpha blending the at least one pixels in the packets to produce a multitude of output packets comprising a packet number and at least one pixel, wherein each of the at least one pixel comprises at least one pixel value.

2. The method of claim 1 further comprising producing an image from the output packets and presenting the image on a display device.

3. The method of claim 1 further comprising synchronizing the packets within the at least two ingress queues before sorting wherein the packets are synchronized based on the packet number within each packet.

4. The method of claim 1 further comprising reordering the packets within at least one of the at least two ingress queues after loading the at least two input queues wherein the packets are reordered based on the packet number within each packet.

5. The method of claim 1 wherein each one of the packets further comprises a frame number and wherein each one of the output packets further comprises a frame number.

6. The method f claim 1 wherein the ingress queue is loaded by storing the packet within a memory and placing a pointer in the ingress queue.

7. A method comprising:

obtaining at least two packet streams comprising a multiplicity of packets wherein each packet comprises a packet number and at least one pixel, and wherein each of the at least one pixel comprises an alpha value, a z value, and at least one pixel value;

loading at least two ingress queues with the packets from the at least two packet streams, taking the packets from the at least two ingress queues and loading the packets into at least two egress queues;

taking the packets from the at least egress queues, z sorting per pixel based on the z value within each one of the at least one pixel to produce z sorted pixels; and

alpha blending the z sorted pixels to produce a multitude of output packets comprising a packet number and at least one pixel, wherein each of the at least one pixel comprises at least one pixel value.

8. The method of claim 7 wherein at least one of the multiplicity of packets is a UDP packet.

9. The method of claim 7 further comprising producing an image from the output packets and presenting the image on a display device.

10. The method of claim 7 further comprising:

loading at least two ingress queues with the packets from the at least two packet streams;

synchronizing the packets loaded within the at least two ingress queues wherein the packets are synchronized based on the packet number within each packet; and

taking the packets from the at least two ingress queues to be loaded into the at least two egress queues.

11. The method of claim 7 further comprising:

loading at least two ingress queues with the packets from the at least two packet streams;

reordering the packets loaded within at least one of the at least two ingress queues wherein the packets are reordered based on the packet number within each packet; and

taking the packets from the at least two ingress queues to be loaded into the at least two egress queues.

12. The method of claim 7 wherein each one of the packets further comprises a frame number and wherein each one of the output packets further comprises a frame number.

13. The method of claim 7 wherein loading the egress queue comprises storing each one of the multiplicity of packets within a memory and placing at least one pointer in the egress queue.

14. The method of claim 7 wherein at least one of the multiplicity of packets is a UDP packet, wherein each one of the packets further comprises a frame number and wherein each one of the output packets further comprises a frame number, wherein the egress queue is loaded by storing each one of the multiplicity of packets within a memory and placing at least one pointer in the egress queue;

and wherein the method of claim 7 further comprises;

loading at least two ingress queues with the packets from the at least two packet streams;

reordering the packets loaded onto at least one of the at least two ingress queues wherein the packets are reordered based on the packet number within each packet

synchronizing the packets loaded onto the at least two ingress queues wherein the packets are synchronized based on the packet number within each packet;

taking the packets from the at least two ingress queues to be loaded into the at least two egress queues; and

producing an image from the output packets and presenting the image on a display device.

15. A system comprising:

at least two ingress queues for receiving at least two packet streams comprising a multiplicity of packets wherein each packet comprises a packet number, a z value, and at least one pixel, and wherein each of the at least one pixel comprises an alpha value and at least one pixel value;

at least one sorting module that obtains packets from the at least two ingress queues and puts the packets onto at least two egress queues based on the z value of the packets; and

a blending module that obtains packets from the at least two egress queues and alpha blends the at least one pixel in the packets to produce a multitude of output packets comprising a packet number and at least one pixel, wherein each of the at least one pixel comprises at least one pixel value.

16. The system of claim 15 wherein the at least two packet streams comprise a multiplicity of IP packets.

17. The system of claim 15 further comprising a synchronization module that can synchronize the multiplicity of packets received by the at least two ingress queues.

18. The system of claim 15 further comprising a reordering module that can reorder the multiplicity of packets received by the at least two ingress queues.

19. The system of claim 15 further comprising at least one network processor wherein at least one of the at least one network processor comprises at least one of the at least one ingress queue and at least one of the at least one sorting module.

20. The system of claim 15 further comprising at least one network processor wherein at least one of the at least one network processor comprises a blending module and at least one of the at least two egress queues.