Radio apparatus with wasteful power consumption diminished without reliance upon analysis by an RSSI and a power control method therefor

• US 20070195911A1
• Filed: 02/20/2007
• Published: 08/23/2007
• Est. Priority Date: 02/20/2006
• Status: Abandoned Application

• Current Assignee: Oki Semiconductor Company Limited (ROHM Co., Ltd.)
• Original Assignee: OKI Electric Industry Company Limited
• Inventors: Ochi, Yusuke
• Application Number:
  US11/708,003
• Publication Number:
  US 20070195911A1
• Time in Patent Office: Days
• US Class Current: 375/324
• CPC Class Codes: H04L 25/4904 using self-synchronising codes, e.g. split-phase codes

Abstract

A mobile phone terminal device checks, in a Manchester determiner, whether or not demodulated data satisfies a predetermined condition for decision exploiting a feature proper to the Manchester code. The Manchester determiner generates a decision signal representing the state of allowance or inhibition, conforming to the decision, and, responsive to the state of allowance of the decision signal. The Manchester determiner allows the demodulated data stored in a buffer to be output. The decision signal is transferred from the determiner to a radio frequency unit and a demodulator. The operation of the radio frequency unit and the demodulator is halted responsive to the state of inhibition of the decision signal.

Claims

1. A radio apparatus for receiving a high frequency signal, comprising:

a frequency converter for converting the high frequency signal into a signal of a base-band frequency and for outputting a converted signal;

a demodulator for demodulation with the converted signal and for converting a demodulated signal into demodulated digital data;

a determiner for determining whether or not the demodulated digital data satisfies a predetermined condition for decision which exploits a feature proper to Manchester code, and for generating a decision signal representing a state of allowance or inhibition resulting from the decision; and

a memory for temporarily storing the demodulated digital data from said determiner,

the demodulated digital data stored in said memory being output responsive to the state of allowance of the decision signal, the decision signal being transferred to said frequency converter and said demodulator to halt operation of said frequency converter and said demodulator responsive to the state of inhibition of the decision signal.

2. The apparatus in accordance with claim 1, wherein the condition for decision includes the inhibition set responsive to consecutive three or more bits of data of a same logical level.

3. The apparatus in accordance with claim 1, further comprising:

a controller for controlling said apparatus; and

an interfacing circuit for interconnecting said memory to said controller,

said radio apparatus controlling the operation of said controller and said interfacing circuit responsive to the decision signal.

4. A radio apparatus for transmitting and receiving a high frequency signal, comprising:

a frequency converter for converting the high frequency signal into a signal of a base-band frequency, for outputting a converted signal and for converting a transmission signal of the base-band frequency into the high frequency signal;

a demodulator for demodulating a converted signal and for converting the demodulated signal into demodulated digital data;

a determiner for determining whether or not the demodulated digital data satisfies a predetermined condition for decision which exploits a feature proper to a Manchester code and for generating a decision signal representing a state of allowance or inhibition associated with the decision;

a memory for temporarily storing the demodulated digital data from said determiner;

an encoder for encoding transmission data for transmission into Manchester code; and

a modulator for modulating the transmission data encoded to output resulting modulated data to said frequency converter,

the demodulated digital data stored in said memory is output responsive to the state of allowance of the decision signal, the decision signal being transferred to said frequency converter and said demodulator, operation of said frequency converter and said demodulator being halted responsive to the state of inhibition of the decision signal.

5. The apparatus in accordance with claim 4, wherein the condition for decision includes the inhibition set responsive to consecutive three or more bits of the data of a same logical level.

6. The apparatus in accordance with claim 4, further comprising:

a controller for controlling said apparatus; and

an interfacing circuit for interconnecting said memory to said controller,

said radio apparatus controlling the operation of said controller and said interfacing circuit responsive to the decision signal.