NANOFABRICATION

• US 20070200477A1
• Filed: 12/19/2006
• Published: 08/30/2007
• Est. Priority Date: 03/14/2001
• Status: Abandoned Application

• Current Assignee: University Of Massachusetts
• Original Assignee: University Of Massachusetts
• Inventors: Tuominen, Mark, Ursache, Andrei, Russell, Thomas, Bal, Mustafa
• Application Number:
  US11/613,017
• Publication Number:
  US 20070200477A1
• Time in Patent Office: Days
• US Class Current: 313/309
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G03F 7/164 using electric, electrostatic or magnetic means; powder coating
• CPC Class Codes: H01J 1/3048 Distributed particle emitters
• CPC Class Codes: H01J 1/53 Electrodes intimately associated with a screen on or from which an image or pattern is formed, picked-up, converted, or stored
• CPC Class Codes: H01J 2201/30469 Carbon nanotubes (CNTs)
• CPC Class Codes: H01L 23/48 Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H10K 10/701 Organic molecular electronic devices
• CPC Class Codes: H10N 10/10 operating with only the Peltier or Seebeck effects
• CPC Class Codes: H10N 10/17 characterised by the structure or configuration of the cell or thermocouple forming the device
• CPC Class Codes: H10N 50/01 Manufacture or treatment

Abstract

Pathways to rapid and reliable fabrication of three-dimensional nanostructures are provided. Simple methods are described for the production of well-ordered, multilevel nanostructures. This is accomplished by patterning block copolymer templates with selective exposure to a radiation source. The resulting multi-scale lithographic template can be treated with post-fabrication steps to produce multilevel, three-dimensional, integrated nanoscale media, devices, and systems.

Claims

1. A nanostructure comprising:

a substrate surface, at least a portion of which is conductive or semiconductive;

a first set of nanowires extending from the conductive or semiconductive substrate surface, wherein one end of the nanowires is in electrical communication with the conductive or semiconductive surface; and

a second set of nanowires extending from the substrate surface,

wherein the first and second sets of nanowires are separated from each other by a region of the substrate surface having a dimension greater than a length of the nanowires, the region of the substrate surface being devoid of nanowires.

2. The nanostructure of claim 1, further comprising at least one conductive or semiconductive layer contacting an opposite end of at least some of the nanowires in the first set, wherein the conductive or semiconductive layer is in electrical communication with at least some of the nanowires in the first set.

3. The nanostructure of claim 1, wherein the first set comprises nanowires having substantially the same length.

4. The nanostructure of claim 3, wherein the first set comprises nanowires having length of at least 20 nm.

5. The nanostructure of claim 4, wherein the first set comprises nanowires having length of at least 100 nm.

6. The nanostructure of claim 1, wherein the substrate is lithographically patterned, having a plurality of independently conductive or semiconductive surface regions.

7. The nanostructure of claim 6, wherein at least the first or second set is in electrical communication with a plurality of independently conductive or semiconductive surface regions.

8. The nanostructure of claim 6, wherein at least some independently conductive or semiconductive surface regions are each in electrical communication with an individual set of nanowires.

9. The nanostructure of claim 2, wherein the substrate is lithographically patterned, having a plurality of independently conductive or semiconductive surface regions.

10. The nanostructure of claim 9, wherein at least the first or second set is in electrical communication with a plurality of independently conductive or semiconductive surface regions.

11. The nanostructure of claim 9, wherein at least some independently conductive or semiconductive surface regions are each in electrical communication with individual sets of nanowires.

12. The nanostructure of claim 11, wherein the conductive or semiconductive layer is in electrical communication with at least some of the nanowires in a plurality of sets of nanowires including the first and second sets.

13. The nanostructure of claim 2, comprising a plurality of the conductive or semiconductive layers.

14. The nanostructure of claim 13, wherein at least some conductive or semiconductive layers are each in electrical communication with at least some nanowires in a plurality of sets.

15. The nanostructure of claim 11, wherein at least some sets comprise nanowires made of material distinct from that of other sets.

16. The nanostructure of claim 15, wherein nanowires differ in their reduction potential.

17. The nanostructure of claim 15, wherein nanowires differ in their semi-metal type.

18. The nanostructure of claim 1, wherein at least some nanowires comprise magnetic material.

19. The nanostructure of claim 1, wherein at least some nanowires are multilayered.

21. The nanostructure of claim 11, wherein at least some sets can be modified to have magnetic properties distinct from those of other sets.

22. The nanostructure of claim 21, wherein the magnetic properties comprise magnetization direction.

23. A field emission display device comprising:

an addressable array of field emitters comprising a nanostructure of claim 12;

and a phosphorescent screen.

24. A thermoelectric cooling device comprising:

a nanostructure of claim 17, comprising nanowires of “

n-” and

“

p-”

types.

25. A magnetic data storage device comprising:

a nanostructure of claim 21, wherein the nanowires have an aspect ratio of at least 20;

1.

26. A magneto-electronic device comprising:

a nanostructure of claim 12, wherein the nanowires comprise magnetic material.

27. The magneto-electronic device of claim 26, wherein the nanowires comprise asymmetric magnetic heterostructure.

35. The nanostructure of claim 1, further comprising a polymer layer disposed on the substrate surface, wherein the nanowires in the first set are dispersed in the polymer layer.

36. The nanostructure of claim 35, wherein the nanowires in both the first and second sets are dispersed in the polymer layer

37. The nanostructure of claim 19, wherein the multilayered nanowires comprise alternating layers of magnetic and non-magnetic material.

20. (canceled)

28-31. -31. (canceled)

32. A device comprising:

a substrate surface comprising at least one electrode;

an array of magnetic nanowires extending vertically from the surface in electrical communication with at least one electrode, wherein the array of nanowires is periodic on the tens of nanometers scale,

wherein the device is a magnetotransfer device.

33. The device of claim 32, wherein the interwire spacing in the array is substantially regular.

34. The device of claim 33, wherein the interwire spacing is less than the spin diffusion length.

38. A nanostructure comprising:

a substrate surface, at least a portion of which is conductive or semiconductive; and

at least one a first set of nanowires extending from the conductive or semiconductive substrate surface, wherein one end of the nanowires is in electrical communication with the conductive or semiconductive surface,

wherein the nanostructure is a multilayer nanostructure.