Verifying individual probe contact using shared tester channels

• US 20070200571A1
• Filed: 02/16/2006
• Published: 08/30/2007
• Est. Priority Date: 02/16/2006
• Status: Abandoned Application

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Quinn, Kevin, Thwaite, Peter
• Application Number:
  US11/354,969
• Publication Number:
  US 20070200571A1
• Time in Patent Office: Days
• US Class Current: 324/754.100
• CPC Class Codes: G01R 31/31926 Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
• CPC Class Codes: G01R 31/54 Testing for continuity

Abstract

Verifying good electrical contact between pads of multiple circuit dies and a probe card or test device, where the driver channels of the test device or probe card device are connected in parallel to corresponding contacts on the circuit dies. Each of a plurality of test device or probe card device driver channels are connected to a corresponding one of a plurality of contacts on each of the plurality of circuit dies such that each test device driver channel is shared among a corresponding contact on each of said plurality of circuit dies. Logic circuitry on each chip connects each of the plurality of contacts to at least one designated contact to output from the device via said at least one designated contact a voltage that corresponds to a voltage at one of said plurality of contacts when a voltage is applied to said one of said plurality of contacts. A voltage is applied at the test device driver channel and the voltage on the designated contact of each of the circuit dies that is coupled to said plurality of contacts on the circuit die is evaluated to determine whether contact is made between the test device driver channel pin or terminal (either directly or via or probe card) and the corresponding contact on each of said plurality of circuit dies.

Claims

1. A method for performing a continuity test between a test device or probe card and individual contacts of a plurality of circuit dies in parallel, comprising:

a. connecting each of a plurality of test device driver channels to a corresponding one of a plurality of contacts on each of said plurality of circuit dies such that each test device driver channel is shared among a corresponding contact on each of said plurality of circuit dies;

b. connecting a designated contact on each of the plurality of circuit dies to the plurality of contacts;

c. connecting each of a plurality of input/output channels of said test device to the designated contact of a corresponding one of said plurality of circuit dies such that each input/output channel of the test device is connected to the designated contact of a different one of said plurality of circuit dies; and

d. evaluating the voltage on the designated contacts of each of the plurality of circuit dies when a voltage is applied at the test device driver channel to determine whether contact is made between the test device driver channel and the corresponding contact on each of said plurality of circuit dies.

2. The method of claim 1, wherein (d) evaluating further comprises (i) applying a “

high”

voltage at the test device driver channel and determining whether there is a “

high”

voltage at each input/output channel of the test device, and (ii) applying a “

low”

voltage at the test device driver channel and determining whether there is a “

low”

voltage at each input/output channel of the test device.

3. The method of claim 2, wherein (d) evaluating is sequentially performed for each of the plurality of test device driver channels to verify continuity on each of the plurality of contacts of said plurality of circuit dies in parallel.

4. The method of claim 1, wherein (d) evaluating further comprises determining that a contact on a circuit die passes the continuity test if the voltage at the designated contact for the corresponding circuit die follows the voltage applied at the test device driver channel.

5. A method for performing a continuity test between a test device and contacts of a plurality of circuit dies in parallel, comprising:

a. connecting each of a plurality of test device driver channels to a corresponding one of a plurality of contacts on each of said plurality of circuit dies such that each test device driver channel is shared among a corresponding contact on each of said plurality of circuit dies; and

b. evaluating the voltage on designated contact that is coupled to said plurality of contacts of each of said plurality of circuit dies when a voltage is applied at the test device driver channel to determine whether contact is made between the test device driver channel and the corresponding contact on each of said plurality of circuit dies in parallel.

6. The method of claim 5, and further comprising connecting each of a plurality of test device input/output channels to the designated contact of a corresponding one of said plurality of circuit dies such that each input/output channel of the test device is connected to the designated contact of a different one of said plurality of circuit dies.

7. The method of claim 6, wherein (b) evaluating further comprises (i) applying a “

high”

voltage at the test device driver channel and determining whether there is a “

high”

voltage at each input/output channel of the test device, and (ii) applying a “

low”

voltage at the test device driver channel and determining whether there is a “

low”

voltage at each input/output channel of the test device.

8. The method of claim 6, and further comprising performing a continuity test on said designated contact of each of said plurality of circuit dies prior said (b) evaluating.

9. The method of claim 5, and further comprising applying a voltage at one of said plurality of test device driver channels to a particular one of said plurality of contacts on each of said plurality circuit dies to enable a control circuit on each of said circuit dies to initiate a continuity test mode on said plurality of integrated circuit dies.

10. A semiconductor integrated circuit device, comprising:

a. a plurality of contacts that are associated with various functions of the integrated circuit device;

b. at least one designated contact through which data may be input to, or output from, the integrated circuit device; and

c. logic circuitry that connects each of the plurality of contacts to said at least one designated contact to output from the device via said at least one designated contact a voltage that corresponds to a voltage at one of said plurality of contacts when a voltage is applied to said one of said plurality of contacts.

11. The device of claim 10, wherein the logic circuitry comprises an OR gate having a plurality of inputs and an output, each of the plurality of OR gate inputs being connected to a corresponding one of said plurality of contacts, and the OR gate output being connected to said at least one designated contact.

12. The device of claim 10, wherein the logic circuitry comprises a plurality of OR gates each having first and second inputs and an output, the first input of each of the plurality of OR gates being connected to ground, a second input of each of said plurality of OR gates being connected to a corresponding one of said plurality of contacts, and wherein the outputs of one of said OR gates is connected to said designated contact and the outputs of each of the other OR gates is tied to the second input of the OR gate associated with an adjacent contact.

13. The device of claim 10, and further comprising a control circuit connected to at least one of said plurality of contacts, the control circuit being responsive to a particular voltage condition on said one of said plurality of contacts to enter a continuity test mode to determine whether electrical contact is made between each of said plurality of contacts and a corresponding terminal of a test device or pin of a probe card device.

14. The device of claim 13, and further comprising a pull-down bleeder circuit connected between the logic circuitry and a corresponding one of all but said at least one of said plurality contacts, and a pull-up bleeder circuit connected between said at least one of said plurality of contacts and said control circuit.

15. In combination, a test device and a plurality of semiconductor integrated circuit devices according to claim 10, wherein said test device comprises a plurality of test device driver channels that connect to a corresponding one of said plurality of contacts on each of said plurality of integrated circuit devices such that each test device driver channel is shared among a corresponding contact on each of said plurality of integrated circuits, a plurality of input/output channels that are connected to the at least one designated contact of a corresponding one of said plurality of integrated circuits such that each input/output channel is connected to the at least one designated contact of a different one of said plurality of integrated circuits, wherein the test device sequentially applies a voltage from one of said plurality of driver channels to perform a continuity test on a corresponding contact of each of said plurality of integrated circuits in parallel.

16. A semiconductor integrated circuit device, comprising:

a. a plurality of contacts that are associated with various functions of the integrated circuit device;

b. at least one designated contact through which data may be input to, or output from, the integrated circuit device; and

c. means for connecting each of the plurality of contacts to said at least one designated contact to output from the device via said at least one designated contact a voltage that corresponds to a voltage at one of said plurality of contacts when a voltage is applied to said one of said plurality of contacts.

17. The device of claim 16, and further comprising control means connected to at least one of said plurality of contacts and responsive to a particular voltage condition on said one of said plurality of contacts to enter a continuity test mode to determine whether electrical contact is made between each of said plurality of contacts and a corresponding terminal of a test device or pin of a probe card device.

18. The device of claim 16, wherein said means for connecting comprises an OR gate having a plurality of inputs and an output, each of the plurality of OR gate inputs being connected to a corresponding one of said plurality of contacts, and the OR gate output being connected to said at least one designated contact.

19. The device of claim 16, wherein said means for connecting comprises a plurality of OR gates each having first and second inputs and an output, the first input of each of the plurality of OR gates being connected to ground, a second input of each of said plurality of OR gates being connected to a corresponding one of said plurality of contacts, and wherein the outputs of one of said OR gates is connected to said at least one designated contact and the outputs of each of the other OR gates is tied to the second input of the OR gate associated with an adjacent contact.