Semiconductor packaging method

• US 20070202680A1
• Filed: 02/28/2006
• Published: 08/30/2007
• Est. Priority Date: 02/28/2006
• Status: Abandoned Application

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Ismail, Aminuddin
• Application Number:
  US11/365,120
• Publication Number:
  US 20070202680A1
• Time in Patent Office: Days
• US Class Current: 438/612
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H01L 2224/1134 Stud bumping, i.e. using a wire-bonding apparatus
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/1308 being stacked
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2225/06548 Conductive via connections through the substrate, container, or encapsulation
• CPC Class Codes: H01L 2225/06568 the devices decreasing in size, e.g. pyramidical stack
• CPC Class Codes: H01L 2225/06589 Thermal management, e.g. cooling
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 24/11 Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

A method of packaging one or more semiconductor dice (10) includes providing a heat spreader (12) and attaching a first semiconductor die (10) to the heat spreader (12). A first set of bumps (14) is formed on respective die pads on a top surface (16) of the first die (10) and at least a second set of bumps (18) is formed on the first set of bumps (14) such that stacks of bumps (20) are formed on the top surface (16) of the first die (10). A molding process is performed such that a mold compound (24) is formed over the one or more dice (10), the stacks of bumps (20) and a portion of the heat spreader (12), which forms a semiconductor package (26).

Claims

1. A method of packaging a semiconductor die, comprising:

providing a heat spreader;

attaching a first semiconductor die to the heat spreader;

forming a first set of bumps on respective die pads on a first surface of the first die;

forming at least a second set of bumps on the first set of bumps such that stacks of bumps are formed on the first surface of the first die; and

performing a molding process, wherein a mold compound is formed over the first die, the bumps and a portion of the heat spreader, thereby forming a semiconductor package.

2. The method of packaging a semiconductor die of claim 1, wherein portions of the top-most bumps are exposed.

3. The method of packaging a semiconductor die of claim 2, further comprising attaching conductive balls to the exposed portions of the top-most bumps.

4. The method of packaging a semiconductor die of claim 2, wherein the top-most bumps are exposed by grinding a surface of the semiconductor package.

5. The method of packaging a semiconductor die of claim 1, further comprising:

attaching a second semiconductor die to the first surface of the first die, wherein the second die is smaller than the first die; and

forming at least a third set of bumps on respective die pads on a top surface of the second die.

6. The method of packaging a semiconductor die of claim 5, wherein the exposed portions of the top-most bumps are co-planar.

7. The method of packaging a semiconductor die of claim 1, wherein the bumps are formed by a wire bonding process.

8. The method of packaging a semiconductor die of claim 1, wherein each stack of bumps has a height of at least about 8 mils.

9. The method of packaging a semiconductor die of claim 1, wherein each stack comprises less than six bumps.

10. The method of packaging a semiconductor die of claim 1, wherein the die has a die pad pitch of at least about 3 mm.

11. The method of packaging a semiconductor die of claim 1, wherein the heat spreader is made of one of copper and aluminium.

12. The method of packaging a semiconductor die of claim 1, wherein the first die is attached to the heat spreader using one of a solder material and an epoxy material.

13. A method of forming a packaged semiconductor device, comprising:

providing a heat spreader;

attaching a first semiconductor die to the heat spreader;

attaching a second semiconductor die to a top surface of the first die;

forming a first set of bumps on respective die pads on the top surface of the first die;

forming at least a second set of bumps on the first set of bumps such that stacks of bumps are formed on the top surface of the first die;

forming at least a third set of bumps on respective die pads on a top surface of the second die; and

performing a molding process, wherein a mold compound is formed over the first and second dice, the bumps and a portion of the heat spreader, thereby forming a packaged semiconductor device.

14. The method of forming a packaged semiconductor device of claim 13, wherein portions of the top-most bumps are exposed, the method further comprising attaching conductive balls to the exposed portions of the top-most bumps.

15. The method of forming a packaged semiconductor device of claim 13, wherein the top-most bumps are exposed by grinding a surface of the semiconductor package.

16. The method of forming a packaged semiconductor device of claim 13, wherein the bumps are formed by a wire bonding process.

17. A method of forming a plurality of semiconductor devices, comprising the steps of:

providing a heat spreader plate;

attaching a plurality of semiconductor dice to predetermined locations of the heat spreader plate, wherein the dice have die bonding pads on a top surface thereof;

forming respective stacks of bumps on the die bonding pads of the semiconductor dice, wherein the top-most bumps of the stacks of bumps are substantially co-planar;

performing a molding process, wherein a mold compound is formed over the dice, the stacks of bumps and a portion of the heat spreader plate; and

performing a singulating operation to separate the dice from each other, thereby forming a plurality of packaged semiconductor package devices.

18. The method of forming a plurality of semiconductor devices of claim 17, wherein portions of the top-most bumps are exposed, further comprising the step of attaching conductive balls to the exposed portions of the top-most bumps.

19. The method of forming a plurality of semiconductor devices of claim 17, wherein the top-most bumps are exposed by grinding a surface of the semiconductor packages.

20. The method of forming a plurality of semiconductor devices of claim 17, wherein the stacks of bumps are formed by a wire bonding process.