RFID Temperature Logger Incorporating A Frequency Ratio Digitizing Temperature Sensor

• US 20070205916A1
• Filed: 06/20/2006
• Published: 09/06/2007
• Est. Priority Date: 02/23/2006
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Wan, Jun, Blom, Eric, Urie, Stuart
• Granted Patent: US 7,474,230 B2
• Time in Patent Office: Days
• US Class Current: 340/870.170
• CPC Class Codes: G01K 7/01 using semiconducting elements having PN junctions G01K7/02, G01K7/16, G01K7/30 take precedence

Abstract

A semi-passive radio frequency identification (RFID) tag being coupled to a battery providing a battery voltage for powering a part of the circuitry of the RFID tag includes an RF communication block receiving and transmitting RF signals, a sensor block including a frequency ratio digitizing temperature sensor for alternately measuring the ambient temperature and the battery voltage, and a control logic block in communication with the RF communication block and the sensor block. The control logic controls the operation of the RF communication block and the sensor block and stores temperature and voltage measurement data generated by the sensor block. In one embodiment, the control logic block of the RFID tag operates based on a system clock and the sensor block provides a reference clock to the control logic block for use in calibrating the system clock of the control logic block.

Claims

1. A semi-passive radio frequency identification (RFID) tag, the RFID tag being coupled to a battery providing a battery voltage for powering a part of the circuitry of the RFID tag, comprising:

an RF communication block receiving and transmitting RF signals;

a sensor block comprising a frequency ratio digitizing temperature sensor for alternately measuring the ambient temperature and the battery voltage; and

a control logic block in communication with the RF communication block and the sensor block, the control logic controlling the operation of the RF communication block and the sensor block and storing temperature and voltage measurement data generated by the sensor block.

2. The semi-passive radio frequency identification tag of claim 1, wherein the control logic block operates based on a system clock and the sensor block provides a reference clock to the control logic block for use in calibrating the system clock of the control logic block.

3. The semi-passive radio frequency identification tag of claim 1, wherein the frequency ratio digitizing temperature sensor comprises:

a temperature sensing circuit providing a current proportional to absolute temperature (“

PTAT current”

) and a second current complementary to absolute temperature (“

CTAT current”

);

a battery voltage measurement circuit providing a battery current proportional to the battery voltage;

an input generation circuit coupled to the temperature sensing circuit to receive the PTAT current and the CTAT current, the input generation circuit generating a first current from the weighted sum of the PTAT current and the CTAT current, the first current being first order temperature independent, the input generation circuit further generating a first corrected current being the sum of the first current and a first portion of the PTAT current, the input generation circuit providing a first output current indicative of the PTAT current, a first output voltage generated by applying the first corrected current to a first resistor, a second output current indicative of the first corrected current, and a second output voltage generated by applying the first current to a second resistor;

a selection circuit receiving the first output current and the battery current and selecting one of the first output current and the battery current as a selected current based on a selection signal; and

a frequency ratio analog-to-digital converter including a data oscillator receiving the selected current and the first output voltage and a reference oscillator receiving the second output current and the second output voltage, the frequency ratio analog-to-digital converter generating a linearity-corrected digital output signal indicative of the selected one of the PTAT current and the battery current.

4. The semi-passive radio frequency identification tag of claim 3, wherein the frequency ratio analog-to-digital converter comprises:

a first current-to-frequency converter as the data oscillator receiving the selected current and the first output voltage from the input generation circuit and providing a first frequency output signal indicative of the selected current;

a second current-to-frequency converter as the reference oscillator receiving the second output current and the second output voltage from the input generation circuit and providing a second frequency output signal being a reference frequency;

a first counter circuit receiving the first frequency output signal and generating a first digital count value indicative of the number of clock cycles of the first frequency output signal over a conversion period;

a second counter circuit receiving the second frequency output signal and generating a second digital count value indicative of the number of clock cycles of the second frequency output signal, wherein the conversion period is defined by a predetermined number of the clock cycles of the second frequency output signal; and

a subtract circuit subtracting the second digital count value from the first digital count value, the subtract circuit providing the digital output signal.

5. The semi-passive radio frequency identification tag of claim 3, wherein the first output current is a duplicate copy of the PTAT current and the first corrected current or a duplicate copy of the first corrected current is applied to the first resistor for generating the first output voltage.

6. The semi-passive radio frequency identification tag of claim 5, wherein the first corrected current or a duplicate copy of the first corrected current is applied as the second output current.

7. The semi-passive radio frequency identification tag of claim 5, wherein the input generation circuit further comprises:

a first summing circuit coupled to sum a second portion of the PTAT current and a third portion of the CTAT current to generate the first current, the first current having a nonlinear characteristic over temperature; and

a second summing circuit coupled to sum the first current and the first portion of the PTAT current to generate the first corrected current, the first portion being a small fraction of the PTAT current.

8. The semi-passive radio frequency identification tag of claim 7, wherein the input generation circuit further comprises a first buffer receiving the PTAT current and applying a first correction factor to the PTAT current to generate the first portion of the PTAT current.

9. The semi-passive radio frequency identification tag of claim 8, wherein the first correction factor has a value less than 0.15.

10. The semi-passive radio frequency identification tag of claim 8, wherein the input generation circuit further comprises a second buffer receiving the first current and applying a second correction factor being one minus the first correction factor to the first current to generate a normalized first current, the second buffer providing the normalized first current to the second summing circuit to be summed with the first portion of the PTAT current.

11. The semi-passive radio frequency identification tag of claim 3, wherein the input generation circuit further generates a second corrected current being the sum of the first current and a fourth portion of the PTAT current, the fourth portion being different than the first portion, the input generation circuit generating the second output voltage by applying the second corrected current to the second resistor.

12. The semi-passive radio frequency identification tag of claim 11, wherein the control logic block operates based on a system clock and the second output voltage and the second output current are used to generate a reference clock to be coupled to the control logic block for use in calibrating the system clock.

13. The semi-passive radio frequency identification tag of claim 11, wherein the input generation circuit further comprises:

a first summing circuit coupled to sum a second portion of the PTAT current and a third portion of the CTAT current to generate the first current, the first current having a nonlinear characteristic over temperature;

a second summing circuit coupled to sum the first current and the first portion of the PTAT current to generate the first corrected current, the first portion being a small fraction of the PTAT current; and

a third summing circuit coupled to sum the first current and the fourth portion of the PTAT current to generate the second corrected current, the fourth portion being a small fraction of the PTAT current and being different than the first portion.

14. The semi-passive radio frequency identification tag of claim 13, wherein the input generation circuit further comprises:

a first buffer receiving the PTAT current and applying a first correction factor to the PTAT current to generate the first portion of the PTAT current; and

a second buffer receiving the PTAT current and applying a second correction factor to the PTAT current to generate the fourth portion of the PTAT current

15. The semi-passive radio frequency identification tag of claim 14, wherein the input generation circuit further comprises:

a third buffer receiving the first current and applying a third correction factor being one minus the first correction factor to the first current to generate a first normalized first current, the third buffer providing the first normalized first current to the second summing circuit to be summed with the first portion of the PTAT current; and

a fourth buffer receiving the first current and applying a fourth correction factor being one minus the second correction factor to the first current to generate a second normalized first current, the fourth buffer providing the second normalized first current to the third summing circuit to be summed with the fourth portion of the PTAT current.

16. The semi-passive radio frequency identification tag of claim 3, wherein the battery voltage measurement circuit comprises:

a first resistor and a second resistor connected in series between the battery voltage and a first node, a common node between the first resistor and the second resistor providing a third output current indicative of the battery voltage;

a first transistor having a first current handling terminal coupled to the first node, a second current handling terminal coupled to a ground voltage and a control terminal coupled to receive a first selection signal, the first selection signal being asserted when a battery voltage measurement is to be taken;

an operational amplifier having an first input terminal coupled to receive the third output current and a second input terminal, and an output terminal;

a second transistor having a first current handling terminal coupled to the battery voltage, a second current handling terminal coupled to the second input terminal of the operational amplifier and a control terminal coupled to the output terminal of the operational amplifier, the second transistor providing a fourth output current to the operational amplifier; and

a third transistor having a first current handling terminal coupled to the battery voltage, a second current handling terminal providing the battery current proportional to the battery voltage and a control terminal coupled to the output terminal of the operational amplifier.

17. The semi-passive radio frequency identification tag of claim 16, wherein the battery voltage measurement circuit further comprises:

a resistor trim digital-to-analog converter (DAC) coupled to the second input terminal of the operational amplifier, the resistor trim DAC being provided to modify the fourth output current in response to a trimming program code for improving the accuracy of the resistance values of the first and second resistors.

18. The semi-passive radio frequency identification tag of claim 3, wherein the selection circuit comprises:

a first switch receiving the battery current and switchably coupling the battery current to a second node, the first switch being controlled by a first selection signal, the first selection signal being asserted when a battery voltage measurement is to be taken;

a second switch receiving the PTAT current and switchably coupling the PTAT current to the second node, the second switch being controlled by a second selection signal, the second selection signal being asserted when a temperature measurement is to be taken;

a fourth transistor having a first current handling terminal coupled to receive the battery current, a second current handling terminal coupled to a third node and a control terminal coupled to receive the first selection signal;

a fifth transistor having a first current handling terminal coupled to the control terminal and to the third node and a second current handling terminal coupled to the ground voltage;

a sixth transistor having a first current handling terminal coupled to receive the PTAT current, a second current handling terminal coupled to a fourth node and a control terminal coupled to receive the second selection signal; and

a seventh transistor having a first current handling terminal coupled to the control terminal and to the fourth node and a second current handling terminal coupled to the ground voltage,

wherein the first switch and the second switch, under the control of the first and second selection signals, operation to provide one of the battery current and the PTAT current as the selected current at the second node.

19. The semi-passive radio frequency identification tag of claim 18, wherein the first selection signal and the second selection signal are complementary and non-overlapping signals.