Time interleaved analogue/digital conversion device with self adaptive equalisation

• US 20070205934A1
• Filed: 01/05/2007
• Published: 09/06/2007
• Est. Priority Date: 01/06/2006
• Status: Active Grant

• Current Assignee: Thales SA
• Original Assignee: Thales SA
• Inventors: Buisson, Philippe
• Granted Patent: US 7,466,250 B2
• Time in Patent Office: Days
• US Class Current: 341/155
• CPC Class Codes: H03M 1/1019 by storing a corrected or correction value in a digital look-up table
• CPC Class Codes: H03M 1/1215 using time-division multiplexing

Abstract

The invention relates to an equalized time interleaved analogue digital conversion device. The analogue digital conversion device comprises a number N of analogue digital converters distributed in N channels. Each analogue digital converter has a sampling frequency N times lower than the required sampling frequency. The digital signal is built up from samples output from each channel. The device comprises a reference channel comprising an analogue digital converter generating samples of the analogue signal. Each filter comprises an equalizer filter. The filter received a digital signal output by the analogue digital converter of the channel on which it is placed. The filter also receives an error signal and outputs a filtered digital signal s(n) corrected for errors deduced from the error signal. The error signal corresponds to the difference at a given time between firstly the digital signal corrected by the filter and secondly by the digital signal output by the analogue digital converter of the reference channel. In particular, the invention is applicable to analogue digital converters operating at a high clock frequency, typically of the order of one gigahertz.

Claims

1. Analog digital conversion device receiving an analog signal at its input and outputting a digital signal at a required sampling frequency, said device comprising:

a number N of analog digital converters distributed in N channels, each a analog digital converter having a sampling frequency N times lower than the required sampling frequency, said analog digital converters having clock signals controlling their sampling frequency, offset in time from each other by one period of a signal at the required sampling frequency, the digital signal being built up from samples delivered to the output from each channel,

said analog digital conversion device comprising a reference channel, said reference channel comprising an analog digital converter generating samples of the analog signal, each channel comprising an equalizer filter, said filter receiving a digital signal at its input output by the analog digital converter on the channel on which it is located and an error signal, said filter outputting a filtered digital signal s(n) corrected for errors deduced from the error signal, the error signal corresponding to the difference at a given time between firstly the digital signal corrected by the filter and secondly by the digital signal output by the analog digital converter of the reference channel, the coefficients of said filter being adjusted to present the response that best minimizes the error signal.

2. The device according to claim 1, wherein the error signal corresponds to the difference at a given time between firstly the digital signal corrected by both the filter and by an offset correction device and secondly by the digital signal output by the analogue digital converter of the reference channel, said offset correction device outputting an offset error signal Y_n, said offset error signal Y_n being generated at time n by applying the mathematical relation y_n+1=y_n+err_n*m at time n where err_n is the value of the error signal (24) at time n and m is a value of the parameter setting.

3. The device according to claim 1, wherein once the analogue digital converter of the reference channel has generated a sample at the same time as the channel placed in the i^th position, where i is between 1 and N, the analogue digital converter of the reference channel will generate the next sample at the same time as the channel arranged in the (i+1 modulo N)^th position.

4. The device according to claim 1, wherein the filter of each channel is a self-adaptive finite pulse response filter, said filter comprising 2.q+1 coefficients, q being an integer.

5. The device according to claim 4 wherein said coefficients of the filters of each channel are adapted using a Least Mean Squares Algorithm.

6. The device according to claim 4, wherein if i is an integer varying from 2 to q, the coefficients C_i are defined by a fixed relation to each other.

7. The device according to claim 4, wherein the central coefficient C₀ and the first coefficient C₁ of filter are updated by a self-adaptive method, the coefficient C₋

1 being equal to −

C₁, the coefficients C<sub>−

i</sub> for i varying from 2 to q being equal to −

C_i, the coefficients C_i for i varying from 2 to q being determined from C₁ by the relation

$C_i=\frac{k<br><br>\left(i\right)·<br><br>C_1}{\left({\left(-1\right)}^{i+1}·<br><br>i\right)}$

with a factor k(i) dependent on i.

8. The device according to claims 4, wherein the factor k(i) is decreasing and varies from approximately 1 for i close to 2 towards zero for i tending towards q.

9. The device according to claim 4, wherein the central coefficient C₀ and the first coefficient C₁ of filter are updated by a self-adaptive method, the coefficient C₋

1 being equal to −

C₁, the coefficients C<sub>−

i</sub> for i varying from 2 to q being equal to −

C_i, the coefficients C_i for i varying from 2 to q being determined from C₁ by the relation

$C_i=\frac{C_1}{i}$

for even values of i and

$C_i=\frac{C_1}{-i}$

for odd values of i.

10. The device according to claim 4, wherein the filter of each channel operates at the required sampling frequency, by oversampling in a ratio N at the input to said filter.

11. The device according to claim 10, wherein the samples available at a given time on one of the other channels are used at the input to said filter, the samples input to the filter being input at the required sampling frequency.