Method And Apparatus For Code Space Search In A Receiver

• US 20070206663A1
• Filed: 03/02/2007
• Published: 09/06/2007
• Est. Priority Date: 03/02/2006
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Tang, Kai, Patrick, Christopher, Grover, Douglas
• Granted Patent: US 8,279,910 B2
• Time in Patent Office: Days
• US Class Current: 375/147
• CPC Class Codes: G01S 19/29 carrier including Doppler, related G01S19/246 takes precedence
• CPC Class Codes: G01S 19/30 code related G01S19/246 takes precedence
• CPC Class Codes: G01S 19/37 Hardware or software details of the signal processing chain
• CPC Class Codes: H04B 1/70775 Multi-dwell schemes, i.e. multiple accumulation times
• CPC Class Codes: H04B 1/708 Parallel implementation
• CPC Class Codes: H04B 2201/7071 with dynamic control of receiver resources

Abstract

Apparatus and methods of implementing code space search of received signals are described herein. A code space search is implemented as a searcher that perform a subtask that is dynamically reconfigurable at each boundary of an initial integration time. Each particular subtask sets forth a programmable configuration of coherent integration hypothesis that are performed during the initial integration time. The searcher stores the results of the coherent integration hypothesis in a first portion of memory. A search accelerator operates on the initial integration results. The search accelerator can perform coherent integration of various frequency bins of different timing hypothesis, can generate energy values of the coherent integration results, and can generate a non-coherent energy summation. The energy values of the coherent integrations and non-coherent energy summations are stored in a second portion of memory. The ability to reconfigure the subtasks and accelerator operation provides flexibility in search space dimensions.

Claims

1. An apparatus for code space search, the apparatus comprising:

a memory;

a searcher configured to perform a plurality of programmable tasks and generate for each programmable task a plurality of coherent integration results obtained over an initial integration time period;

an accelerator configured to determine at least one coherent accumulation of searcher integration results based on one or more coherent integration lengths and frequency offsets determined by a selectable search mode; and

a data mover configured to transfer the integration results from the searcher to the memory, and configured to transfer integration results from memory to the accelerator.

2. The apparatus of claim 1, wherein the searcher comprises a double buffered searcher results buffer, where each block of the double buffered searcher results buffer is associated with one of the searcher or the data mover.

3. The apparatus of claim 1, wherein the searcher is configured to perform up to 32 tasks in one initial integration period.

4. The apparatus of claim 1, wherein each task specifies a number of code phase hypothesis of an associated code, and wherein each of the plurality of coherent integration results is based on one of the number of code phase hypothesis.

5. The apparatus of claim 1, wherein the initial integration period comprises a code period.

6. The apparatus of claim 1, wherein the initial integration period comprises approximately one millisecond.

7. The apparatus of claim 1, wherein the searcher is configured to determine plurality of programmable tasks based on a task queue that can be updated every initial integration period.

8. The apparatus of claim 7, wherein the searcher is configured to determine a task queue for a future initial integration period during processing of tasks in a task queue corresponding to a current initial integration period.

9. The apparatus of claim 1, wherein the accelerator is further configured to generate an energy value for each of the at least one coherent accumulation.

10. The apparatus of claim 9, wherein the accelerator is further configured to generate a non-coherent integration of energy values.

11. The apparatus of claim 1, wherein the accelerator is configured to generate the at least one coherent accumulation across a frequency span that is less than or equal to approximately 500 Hertz.

12. The apparatus of claim 1, wherein the accelerator comprises a double buffer, where each block of the double buffer is associated with one of the accelerator or the data mover, and wherein access by the accelerator and data mover are limited to the block of the double buffer with which it is associated.

13. The apparatus of claim 1, wherein a number of frequency offset is determined, based in part, on the integration length.

14. An apparatus for code space search, the apparatus comprising:

a memory having a portion allocated to code space search, the portion dependent upon an active programmable search mode; and

an integrated circuit coupled to the memory, the integrated circuit comprising;

a searcher configured to generate a plurality of coherent integration results determined over an initial integration period for each of a plurality of programmable search tasks;

an accelerator configured to determine a coherent accumulation of coherent integration results over a coherent integration length and frequency hypothesis determined by the active programmable search mode; and

a data mover configured to perform DMA data transfers between the searcher and memory and between the accelerator and memory.

15. The apparatus of claim 14, wherein each search task specifies a set of code hypothesis selected from a code.

16. The apparatus of claim 14, wherein the searcher is configured to support up to 32 distinct search tasks in one initial integration period.

17. The apparatus of claim 14, wherein the data mover is configured to perform data transfers from memory to an associated block of a double buffered sample buffer of the accelerator.

18. The apparatus of claim 14, wherein the data mover is configured to perform data transfers to memory from an associated block of a double buffered searcher buffer of the searcher.

19. A method of code space search, the method comprising:

capturing complex samples of a received wireless signal;

configuring a plurality of code space search tasks;

executing each of the code space search tasks to generate a plurality of coherent integration results obtained over an initial integration time; and

determining a coherent accumulation of a plurality of coherent integration results, an integration length and frequency offset associated with the coherent accumulation based on a programmable code space search mode.

20. The method of claim 19, further comprising determining an energy of the coherent accumulation.

21. The method of claim 19, further comprising:

determining an energy of the coherent accumulation; and

determining a non-coherent integration of an energy grid position corresponding to the energy.

22. The method of claim 21, further comprising:

storing the non-coherent integration in a block of an energy double buffer associated with an accelerator;

swapping an association of the block of the energy double buffer to a data mover; and

transferring the non-coherent integration from the block of the energy double buffer to a memory.

23. The method of claim 19, further comprising storing the plurality of coherent integration results in a block of a searcher double buffer associated with a searcher.

24. The method of claim 23, further comprising:

swapping an association of the block of the searcher double buffer to a data mover; and

transferring coherent integration results from the block of the searcher double buffer to a memory.

25. The method of claim 19, wherein executing each of the code space search tasks comprises:

determining a plurality of code space hypothesis; and

correlating each of the code space hypothesis to at least a portion of the complex samples.

26. The method of claim 19, wherein determining the coherent accumulation comprises:

transferring the plurality of coherent integration results from a memory to a first block of a sample double buffer;

swapping an association of the first block of the double buffer to an accelerator; and

determining the coherent accumulation of the plurality of coherent integration results in the first block.

27. A method of code space search, the method comprising:

capturing complex samples of a received wireless signal;

executing each of a plurality of code space search tasks to generate a plurality of coherent integration results corresponding to a plurality of code space hypothesis;

storing the plurality of coherent integration results in memory;

retrieving from memory a number of coherent integration results corresponding to an integration length; and

determining a coherent accumulation of the number of coherent integration results.

28. The method of claim 27, further comprising determining an energy of the coherent accumulation.

29. The method of claim 27, further comprising determining a non-coherent energy integration based on an energy of the coherent accumulation.

30. The method of claim 27, wherein executing each of the plurality of code space search tasks comprises determining a correlation of a plurality of code hypothesis to at least a portion of the complex samples.

31. The method of claim 27, wherein storing the plurality of coherent integration results in memory comprises:

storing at least a portion of the plurality of coherent search results in a block of a double buffer;

swapping an association of the block of the double buffer; and

transferring the portion of the plurality of coherent search results from the block of the double buffer to memory.

32. An apparatus for code space search, the apparatus comprising:

means for capturing complex samples of a received wireless signal;

means for configuring a plurality of code space search tasks;

means for searching according to each of the code space search tasks to generate a plurality of coherent integration results obtained over an initial integration time; and

means for determining a coherent accumulation of a plurality of coherent integration results, an integration length and frequency offset associated with the coherent accumulation based on a programmable code space search mode.

33. An apparatus for code space search, the apparatus comprising:

means for capturing complex samples of a received wireless signal;

means for searching the complex samples according to each of a plurality of code space search tasks to generate a plurality of coherent integration results corresponding to a plurality of code space hypothesis;

means for storing the plurality of coherent integration results;

means for transferring a number of coherent integration results corresponding to an integration length; and

means for determining a coherent accumulation of the number of coherent integration results.