Method of fabricating backside illuminated image sensor

• US 20070207566A1
• Filed: 03/06/2006
• Published: 09/06/2007
• Est. Priority Date: 03/06/2006
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Shiau, Gwo-Yuh, Fu, Shih-Chi, Hsieh, Yuan-Chih, Shiu, Feng-Jia, Yao, Liang-Lung
• Granted Patent: US 7,648,851 B2
• Time in Patent Office: Days
• US Class Current: 438/64
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A method for fabricating a back-side illuminated image sensor includes providing a semiconductor substrate having a front surface and back surface, providing a plurality of transistors, metal interconnects, and metal pads on front surface of the substrate, bonding a supporting layer to the front surface of the substrate, thinning-down the semiconductor substrate from the back surface, clearing-out a region of the semiconductor substrate from the back surface that covers a fine alignment mark by performing registration from the back surface and using a global alignment mark as a reference, and processing the back surface of the substrate by performing registration from the back surface and using the fine alignment mark as a reference.

Claims

1. A method for fabricating a back-side illuminated image sensor, comprising:

providing a semiconductor substrate having a front surface and a back surface;

forming a plurality of transistors, metal interconnects, and metal pads on the front surface of the substrate;

bonding a supporting layer to the front surface of the substrate;

thinning-down the semiconductor substrate from the back surface;

clearing-out a region of the substrate from the back surface that covers a fine alignment mark by performing registration from the back surface and using a global alignment mark as a reference; and

processing the back surface of the substrate by performing registration from the back surface and using the fine alignment mark as a reference.

2. The method of claim 1, wherein the semiconductor substrate is a silicon.

3. The method of claim 1, wherein the semiconductor substrate is a silicon-on-insulator arrangement.

4. The method of claim 1, wherein the semiconductor substrate is an epitaxial silicon arrangement.

5. The method of claim 1, wherein the global alignment mark is formed on the front surface of the substrate by at least a 1X reticle pattern.

6. The method of claim 1, wherein the fine alignment mark is formed on the front surface of the substrate by at least a 4X reticle pattern.

7. The method of claim 1, wherein the fine alignment mark is a mirror-image type alignment or overlay mark.

8. The method of claim 7, wherein the fine alignment mark comprises a structure selected from the group consisting of:

metal contact, metal pad, deep trench, and polysilicon.

9. The method of claim 8, wherein the metal contact and polysilicon structure are adjacent to a shallow trench isolation (STI) structure.

10. The method of claim 1, wherein the supporting layer is a transparent glass.

11. The method of claim 10, wherein performing registration from the back surface of the substrate is by using infrared light through the transparent glass and optically aligning the fine alignment mark with a mirror-image type reticle pattern.

12. The method of claim 1, wherein the supporting layer is a silicon wafer.

13. The method of claim 12, wherein performing registration from the back surface of the substrate is by using visible light through the silicon wafer and optically aligning the fine alignment mark with a mirror-image type reticle pattern.

14. The method of claim 1, further comprising filling and leveling the cleared-out region of the substrate with an organic material.

15. The method of claim 14, wherein the organic material is a positive photoresist.

16. The method of claim 14, wherein the organic material is a negative photoresist.

17. The method of claim 1, wherein processing the back surface of the substrate further comprises:

forming a first, second, and third doped region within an active region of the substrate;

forming a red, green, and blue color filter on the back surface of the substrate and aligned with the first, second, and third doped region, respectively; and

forming a microlens over the color filter.

18. A method for fabricating a back-side illuminated image sensor, comprising:

providing a semiconductor substrate having a front surface, back surface, active region, and clear-out region;

forming a first alignment mark on the front surface of the substrate;

forming a second alignment mark on the front surface of the clear-out region;

bonding a supporting layer to the front surface of the substrate;

thinning the semiconductor substrate from the back surface;

selectively etching a portion of the substrate from the back surface within the clear-out region by performing registration from the back surface and using the first alignment mark as a reference; and

processing the active region of the substrate from the back surface by performing registration from the back surface and using the second alignment mark as a reference.

19. The method of claim 18, wherein performing registration from the back surface of the substrate is by using radiation through the supporting layer and optically detecting and aligning the second alignment mark with an alignment mark on a reticle pattern.

20. The method of claim 19, wherein the alignment mark on the reticle pattern is a mirror-image of the second alignment mark.

21. The method of claim 19, wherein the alignment mark on the reticle pattern is a mirror-image shape that overlays on the second alignment mark.

22. A method for fabricating an electronic device, comprising:

providing a substrate with a front surface and a back surface;

forming a first alignment mark for global alignment on the front surface of the substrate;

forming a second alignment mark for fine alignment in a clear-out region on the front surface of the substrate;

aligning the substrate from the back surface using the first alignment mark; and

after aligning, removing a portion of the back surface of the substrate at the clear-out region for locating the second alignment mark.

23. The method of claim 22, further comprising adding a supporting layer to the front surface of the substrate.

24. The method of claim 22, further comprising reducing a thickness of the substrate prior to aligning the substrate.

25. The method of claim 22, wherein the first alignment mark is formed by a 1X reticle pattern.

26. The method of claim 22, wherein the second alignment mark is a mirror-image type alignment or overlay mark formed by a 4X reticle pattern.