Electronic device with temporary flag for fail safe and power cycling

• US 20070208957A1
• Filed: 01/17/2007
• Published: 09/06/2007
• Est. Priority Date: 03/03/2006
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Leis, Michael
• Granted Patent: US 7,992,029 B2
• Time in Patent Office: Days
• US Class Current: 713/300
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24
• CPC Class Codes: G06F 3/0632 by initialisation or re-initialisation of storage systems

Abstract

An electronic device includes a flag circuit configured to generate a status flag indicating whether or not a power supply voltage to the electronic device has been cycled, and a controller configured to control an operation of the electronic device and to modify an operational characteristic of the electronic device in response to the status flag indicating that the power supply voltage to the electronic device has been cycled. Methods of operating an electronic device include generating a status flag indicating whether or not a power supply voltage to the electronic device has been cycled within about a defined time, and modifying an operational characteristic of the electronic device in response to the status flag indicating that the power supply voltage to the electronic device has been cycled within about the defined time.

Claims

1. An electronic device, comprising:

a flag circuit configured to generate a status flag indicating whether or not a power supply voltage to the electronic device has been cycled within about a defined time; and

a controller configured to control an operation of the electronic device and to modify an operational characteristic of the electronic device in response to the status flag indicating that the power supply voltage to the electronic device has been cycled within about the defined time.

2. The electronic device of claim 1, wherein the flag circuit comprises a capacitor, wherein the status flag is representative of a voltage on the capacitor, and wherein the defined time is at least partially defined by a capacitance of the capacitor.

3. The electronic device of claim 2, wherein the capacitor is coupled to the power supply voltage through a first resistor, the electronic device further comprising:

a comparator including an input terminal and an output terminal and configured to compare an input voltage at the input terminal with a reference voltage, wherein the capacitor is further coupled to the input terminal of the comparator.

4. The electronic device of claim 3, wherein the comparator is further configured to output a first logic level if the input voltage at the input terminal exceeds the reference voltage and to output a second logic level if the input voltage at the input terminal is less than the reference voltage.

5. The electronic device of claim 3, further comprising a rectifier between the first resistor and the capacitor, wherein the rectifier is configured to block a flow of current from the capacitor to the first resistor.

6. The electronic device of claim 3, further comprising a bleed resistor in parallel with the capacitor, the bleed resistor having a resistance greater than a resistance of the first resistor, and wherein the defined time is at least partially defined by the resistance of the bleed resistor.

7. The electronic device of claim 3, further comprising a set/reset circuit coupled to the capacitor, wherein the set/reset circuit is configured to set the voltage on the capacitor to the power supply voltage upon receipt of a SET FLAG command, and to reset the voltage on the capacitor to zero upon receipt of a RESET FLAG command.

8. The electronic device of claim 3, further comprising a voltage divider having an output terminal and configured to generate the reference voltage from the power supply voltage, wherein the output terminal of the voltage divider is connected to the comparator.

9. The electronic device of claim 1, wherein the electronic device comprises a disk drive including a data storage disk, and wherein the controller is configured to reduce an angular acceleration of the data storage disk during startup in response to the status flag indicating that the power supply voltage to the electronic device has been cycled.

10. The electronic device of claim 1, wherein the electronic device comprises a disk drive including a data storage disk, and wherein the controller is configured to alter an operational threshold or parameter of the data storage disk in response to the status flag indicating that the power supply voltage to the electronic device has been cycled, wherein the operational threshold or parameter comprises a temperature threshold, a spin start delay, a position error threshold, a modified seek torque, and/or a bit error rate threshold.

11. The electronic device of claim 1, wherein the controller is further configured to return the altered operational characteristic of the electronic device to a previous value after the occurrence of a predetermined condition, wherein the predetermined condition comprises the passage of a predetermined time period following the status flag indicating that the power supply voltage to the electronic device has been cycled and/or the occurrence of a start up without the status flag indicating that the power supply has been cycled.

12. The electronic device of claim 1, wherein the controller is further configured to initiate a fault recovery routine or diagnostic routine in response to the status flag indicating that the power supply voltage to the electronic device has been cycled.

13. A circuit configured to generate a status flag indicating whether or not a power supply voltage to an electronic device has been cycled, the circuit comprising:

a first resistor; and

a capacitor that is coupled to the power supply voltage through the first resistor;

wherein the status flag is representative of a voltage on the capacitor.

14. The circuit of claim 13, further comprising:

a comparator including an input terminal and an output terminal and configured to compare an input voltage at the input terminal with a reference voltage, wherein the capacitor is coupled to the input terminal of the comparator.

15. The circuit of claim 14, wherein the comparator is further configured to output a first logic level if the input voltage at the input terminal exceeds the reference voltage and to output a second logic level if the input voltage at the input terminal is less than the reference voltage.

16. The circuit of claim 14, further comprising a rectifier between the first resistor and the capacitor, wherein the rectifier is configured to block a flow of current from the capacitor to the first resistor.

17. The circuit of claim 14, further comprising a bleed resistor in parallel with the capacitor, the bleed resistor having a resistance greater than a resistance of the first resistor.

18. The circuit of claim 14, further comprising a set/reset circuit coupled to the capacitor, wherein the set/reset circuit is configured to set the voltage on the capacitor to the power supply voltage upon receipt of a SET FLAG command, and to reset the voltage on the capacitor to zero upon receipt of a RESET FLAG command.

19. The circuit of claim 14, further comprising a voltage divider having an output terminal and configured to generate the reference voltage from the power supply voltage, wherein the output terminal of the voltage divider is connected to the comparator.

20. A method of operating an electronic device, comprising:

generating a status flag indicating whether or not a power supply voltage to the electronic device has been cycled within about a defined time; and

modifying an operational characteristic of the electronic device in response to the status flag indicating that the power supply voltage to the electronic device has been cycled within about the defined time.

21. The method of claim 20, wherein generating the status flag comprises comparing a voltage across a capacitor to a reference voltage, the method further comprising charging the capacitor from the power supply voltage using an RC circuit when the power supply voltage is switched on, and discharging the capacitor when the power supply voltage is switched off.

22. The method of claim 21, wherein a charge rate of the capacitor through the RC circuit is faster than a discharge rate of the capacitor.

23. The method of claim 22, wherein discharging the capacitor comprises discharging the capacitor through a bleed resistor having a higher resistance than the resistance of the RC circuit used in charging the capacitor.