Systems, devices, and methods for arc fault detection
First Claim
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1. A system comprising:
- an application specific integrated circuit configured to provide an output signal, said output signal configured to trip a device in an electrical circuit responsive to a detected fault, said application specific integrated circuit comprising;
an on-chip linear temperature sensor, said application specific integrated circuit configured to correct at least one measured electrical value responsive to a temperature measured by said on-chip linear temperature sensor; and
a level and timing control circuit configured to avoid nuisance trips caused by noise in a received signal from said electrical circuit, said level and timing control circuit configured to compare an amplitude of said received signal to a first predetermined threshold, said level and timing control circuit configured to compare a duration of said received signal to a second predetermined threshold.
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Abstract
Certain exemplary embodiments comprise a system that comprises an application specific integrated circuit configured to provide an output signal. The output signal can be configured to trip a device in an electrical circuit responsive to a detected fault. The application specific integrated circuit can comprise a temperature sensor. The application specific integrated circuit can be configured to correct at least one measured electrical value responsive to a temperature measured by the temperature sensor.
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Citations
23 Claims
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1. A system comprising:
an application specific integrated circuit configured to provide an output signal, said output signal configured to trip a device in an electrical circuit responsive to a detected fault, said application specific integrated circuit comprising;
an on-chip linear temperature sensor, said application specific integrated circuit configured to correct at least one measured electrical value responsive to a temperature measured by said on-chip linear temperature sensor; and
a level and timing control circuit configured to avoid nuisance trips caused by noise in a received signal from said electrical circuit, said level and timing control circuit configured to compare an amplitude of said received signal to a first predetermined threshold, said level and timing control circuit configured to compare a duration of said received signal to a second predetermined threshold. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A method comprising:
producing an application specific integrated circuit configured to provide an output signal, said output signal configured to trip a device in an electrical circuit responsive to a detected fault, said application specific integrated circuit comprising;
an on-chip linear temperature sensor, said application specific integrated circuit configured to correct at least one measured electrical value responsive to a temperature measured by said on-chip linear temperature sensor; and
a level and timing control circuit configured to avoid nuisance trips due to noise in a received signal from said electrical circuit, said level and timing control circuit configured to compare an amplitude of said received signal to a first predetermined threshold, said level and timing control circuit configured to compare a duration of said received signal to a second predetermined threshold.
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23. An application specific integrated circuit comprising:
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an output circuit configured to provide an output signal, said output signal configured to trip a device in an electrical circuit responsive to a detected fault;
an on-chip linear temperature sensor, said application specific integrated circuit configured to correct at least one measured electrical value responsive to a temperature measured by said on-chip linear temperature sensor; and
a level and timing control circuit configured to avoid nuisance trips caused by noise in a received signal from said electrical circuit, said level and timing control circuit configured to compare an amplitude of said received signal to a first predetermined threshold, said level and timing control circuit configured to compare a duration of said received signal to a second predetermined threshold.
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Specification