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SEMICONDUCTOR MEMORY DEVICE

  • US 20070210418A1
  • Filed: 03/01/2007
  • Published: 09/13/2007
  • Est. Priority Date: 03/09/2006
  • Status: Abandoned Application
First Claim
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1. A semiconductor memory device comprising:

  • a support substrate including a first conductivity type semiconductor;

    an insulation film provided on the support substrate;

    a semiconductor layer provided on the insulation film;

    a first well of a second conductivity type provided in the support substrate;

    second wells of the first conductivity type provided in the first well;

    a third well of a second conductivity type provided in the support substrate;

    a memory cell including a first source of the second conductivity type, a first drain of the second conductivity type and a body region formed between the first source and the first drain, the first source and the first drain being formed in the semiconductor layer located above one of the second wells, the body region being in an electrically floating state and accumulating or emitting charges for storing therein data;

    a first logic circuit element including a second source of the second conductivity type, a second drain of the second conductivity type and a channel region of the first conductivity type formed between the second source and the second drain, the second source and the second drain being formed on the semiconductor layer above another one of the second wells; and

    a second logic circuit element including a third source of the first conductivity type, a third drain of the first conductivity type and a channel region of the second conductivity type formed between the third source and the third drain, the third source and the third drain being formed on the semiconductor layer above the third well.

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