DIGITAL TRANSMITTER

• US 20070211821A1
• Filed: 03/12/2007
• Published: 09/13/2007
• Est. Priority Date: 03/13/2006
• Status: Active Grant

• Current Assignee: Interdigital Technology Corporation (InterDigital, Inc.)
• Original Assignee: Interdigital Technology Corporation (InterDigital, Inc.)
• Inventors: Kazakevich, Leonid, Haque, Tanbir
• Granted Patent: US 7,826,554 B2
• Time in Patent Office: Days
• US Class Current: 375/297
• CPC Class Codes: H03F 2200/331 Sigma delta modulation being used in an amplifying circuit
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 3/217 Class D power amplifiers; Switching amplifiers
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H04B 1/0014 using DSP [Digital Signal Processor] quadrature modulation and demodulation
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 2001/0408 with power amplifiers
• CPC Class Codes: H04L 27/361 Modulation using a single or unspecified number of carriers, e.g. with separate stages of phase and amplitude modulation
• CPC Class Codes: H04L 27/362 Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated H04L27/366 takes precedence
• CPC Class Codes: H04L 27/364 Arrangements for overcoming imperfections in the modulator, e.g. quadrature error or unbalanced I and Q levels

Abstract

In a digital Cartesian modulation transmitter, an encoder generates 1-bit logic signals from in-phase and quadrature signals. A single bit digital modulator multiplexes the 1-bit logic signals for Cartesian I/Q modulation. A digital upconverter (DUC) upconverts the multiplexed 1-bit logic signal. A digital power amplifier (DPA) generates a radio frequency (RF) signal based on the upconverted signal. In a digital polar modulation transmitter, an encoder converts a magnitude signal to a first 1-bit logic signal. A digital phase modulator modulates a carrier using a phase signal to generate a second 1-bit logic signal. A DUC upconverts the second 1-bit logic signal. A first-in first-out (FIFO) memory stores the first 1-bit logic signal. A combiner combines angle information contained in the second 1-bit logic signal with magnitude information contained in the first 1-bit logic signal stored in the FIFO memory. A DPA generates an RF signal based on the combined signal.

Claims

1. A digital transmitter comprising:

an encoder for generating 1-bit logic signals from an in-phase (I) signal and a quadrature (Q) signal;

a single bit digital modulator (SBDM) for multiplexing the 1-bit logic signals for Cartesian I/Q modulation;

a digital upconverter (DUC) for upconverting the multiplexed 1-bit logic signal to generate an upconverted signal; and

a digital power amplifier (DPA) for generating a radio frequency (RF) signal based on the upconverted signal.

2. The digital transmitter of claim 1 further comprising:

a digital channelization unit for selecting a frequency channel for transmission based on a channel selection command from a modem.

3. The digital transmitter of claim 1 wherein the encoder is one of a delta modulator, a sigma delta modulator, a pulse width modulator, a pulse position modulator, and a pulse duration modulator.

4. The digital transmitter of claim 1 wherein the encoder implements a transmit power control (TPC) function based on a TPC command from a modem.

5. The digital transmitter of claim 1 wherein the DUC outputs a 1-bit logic signal.

6. The digital transmitter of claim 1 wherein the DUC outputs a 1.5-bit logic signal.

7. The digital transmitter of claim 1 wherein the SBDM performs a channel selection function based on a channel selection command from a modem.

8. The digital transmitter of claim 1 wherein the SBDM is a 4-to-1 multiplexer for multiplexing the 1-bit logic signals.

9. The digital transmitter of claim 8 wherein the encoder outputs both a true and inverted versions of the 1-bit logic signals and the 4-to-1 multiplexer outputs the 1-bit logic signal including a repeating sequence of I, Q, −

I, −

Q signals.

10. The digital transmitter of claim 1 wherein the DUC is a single side band processor.

11. The digital transmitter of claim 1 wherein the DUC is a double side band processor.

12. The digital transmitter of claim 11 wherein the DUC is an exclusive OR (XOR) gate that performs XOR operations of the multiplexed 1-bit logic signal and a clock signal.

13. The digital transmitter of claim 1 wherein the DUC performs a TPC function based on a power control command from a modem.

14. The digital transmitter of claim 1 wherein the DPA comprises a plurality of inverters that are controlled digitally.

15. The digital transmitter of claim 14 wherein the DPA implements a 1-bit logic operation and true and inverted versions of the upconverted signal are applied to each input of two inverters, respectively.

16. The digital transmitter of claim 14 wherein the DPA implements a 1.5 bit logic operation and both inputs of two inverters are driven with the upconverted signal.

17. The digital transmitter of claim 14 wherein a voltage supply to the inverters are controlled to control a gain of the DPA.

18. The digital transmitter of claim 1 wherein the DPA performs a power control function based on a power control command from a modem.

19. A digital transmitter comprising:

an encoder for converting a magnitude signal received from a modem to a first 1-bit logic signal;

a digital phase modulator (DPM) for modulating a carrier using a phase signal received from the modem to generate a second 1-bit logic signal;

a digital upconverter (DUC) for upconverting the second 1-bit logic signal;

a first-in first-out (FIFO) memory for storing the first 1-bit logic signal and aligning the magnitude signal processed by the encoder with the phase signal processed by the DPM and the DUC;

a magnitude and phase combiner for combining angle information contained in the second 1-bit logic signal with magnitude information contained in the first 1-bit logic signal stored in the FIFO memory and outputting a combined signal; and

a digital power amplifier (DPA) for generating a radio frequency (RF) signal based on the combined signal.

20. The digital transmitter of claim 19 wherein the DPM performs a channel selection function to select a specific channel frequency based on a channel selection command from the modem.

21. The digital transmitter of claim 19 wherein the DPM is one of a direct digital synthesizer (DDS) and a phase locked loop (PLL)/voltage controlled oscillator (VCO).

22. The digital transmitter of claim 19 wherein the encoder is one of a delta modulator, a sigma delta modulator, a pulse width modulator, a pulse position modulator, and a pulse duration modulator.

23. The digital transmitter of claim 19 wherein the encoder implements a transmit power control (TPC) function based on a TPC command from the modem.

24. The digital transmitter of claim 19 wherein the DUC outputs a 1-bit logic signal.

25. The digital transmitter of claim 19 wherein the DUC is a single side band processor.

26. The digital transmitter of claim 19 wherein the DUC is a double side band processor.

27. The digital transmitter of claim 26 wherein the DUC is an exclusive OR (XOR) gate that performs XOR operations on a phase modulated carrier signal and a clock signal.

28. The digital transmitter of claim 19 wherein the DUC performs a TPC function based on a power control command from the modem.

29. The digital transmitter of claim 19 wherein the DPA comprises a plurality of inverters that are controlled digitally.

30. The digital transmitter of claim 29 wherein the DPA implements a 1-bit logic operation and true and inverted versions of the upconverted signal are applied to each input of two inverters, respectively.

31. The digital transmitter of claim 29 wherein the DPA implements a 1.5 bit logic operation and both inputs of two inverters are driven with the upconverted signal.

32. The digital transmitter of claim 29 wherein a voltage supply to the inverters are controlled to control a gain of the DPA.

33. The digital transmitter of claim 19 wherein the DPA performs a power control function based on a power control command from a modem.

34. The digital transmitter of claim 19 wherein the magnitude and phase combiner is one of a 1-bit multiplier, an exclusive OR (XOR) gate, and a multiplexer.

35. A digital transmitter comprising:

an encoder for converting a magnitude signal received from a modem to a first 1-bit logic signal;

a digital phase modulator (DPM) for modulating a carrier using a phase signal received from the modem to generate a second 1-bit logic signal;

a first-in first-out (FIFO) memory for storing the first 1-bit logic signal and aligning the magnitude signal processed by the encoder with the phase signal processed by the DPM;

a magnitude and phase combiner for combining angle information contained in the second 1-bit logic signal with magnitude information contained in the first 1-bit logic signal stored in the FIFO memory and outputting a combined signal;

a digital upconverter (DUC) for upconverting the combined signal; and

a digital power amplifier (DPA) for generating a radio frequency (RF) signal based on the upconverted combined signal.

36. A method for transmitting a signal with a digital transmitter, the method comprising:

generating 1-bit logic signals from an in-phase (I) signal and a quadrature (Q) signal;

multiplexing the 1-bit logic signals for Cartesian I/Q modulation;

upconverting the multiplexed 1-bit logic signal to generate an upconverted signal; and

generating a radio frequency (RF) signal based on the upconverted signal.

37. The method of claim 36 further comprising:

selecting a frequency channel for transmission based on a channel selection command from a modem.

38. The method of claim 37 wherein the frequency channel is selected while the 1-bit signals are multiplexed.

39. The method of claim 37 wherein the frequency channel is selected before the 1-bit signals are generated.

40. The method of claim 36 further comprising:

performing a transmit power control (TPC) function based on a TPC command from a modem.

41. The method of claim 40 wherein the TPC function is performed while the 1-bit logic signals are generated.

42. The method of claim 40 wherein the TPC function is performed while the multiplexed 1-bit logic signal is upconverted.

43. The method of claim 40 wherein the TPC function is performed while the RF signal is generated.

44. A method for transmitting a signal with a digital transmitter, the method comprising:

converting a magnitude signal received from a modem to a first 1-bit logic signal;

modulating a carrier using a phase signal received from the modem to generate a second 1-bit logic signal;

upconverting the second 1-bit logic signal;

storing the first 1-bit logic signal in a first-in first-out (FIFO) memory for aligning the magnitude signal with the phase signal;

combining angle information contained in the second 1-bit logic signal with magnitude information contained in the first 1-bit logic signal stored in the FIFO memory to generate a combined signal; and

generating a radio frequency (RF) signal based on the combined signal.

45. The method of claim 44 further comprising:

performing a channel selection function to select a specific channel frequency based on a channel selection command from the modem while modulating the carrier.

46. The method of claim 44 further comprising:

performing a transmit power control (TPC) function based on a TPC command from the modem.

47. The method of claim 46 wherein the TPC function is performed while the the first 1-bit logic signal is generated.

48. The method of claim 46 wherein the TPC function is performed while the RF signal is generated.

49. A method for transmitting a signal with a digital transmitter, the method comprising:

converting a magnitude signal received from a modem to a first 1-bit logic signal;

modulating a carrier using a phase signal received from the modem to generate a second 1-bit logic signal;

storing the first 1-bit logic signal and aligning the magnitude signal with the phase signal;

combining angle information contained in the second 1-bit logic signal with magnitude information contained in the first 1-bit logic signal and outputting a combined signal;

upconverting the combined signal; and

generating a radio frequency (RF) signal based on the upconverted combined signal.