Modifying node descriptors to reflect memory migration in an information handling system with non-uniform memory access
First Claim
1. An information handling system, comprising:
- a first node and a second node, wherein each node includes a processor and a local system memory accessible to the processor via a memory bus;
an interconnect between the first node and the second node enabling the processor on the first node to access the system memory on the second node;
an affinity table, stored in a computer readable medium, and indicative of node locations associated with selected portions of memory;
a memory migration module operable to copy contents of a first portion of memory on the first node to a second portion of memory on the second node and to reassign a first block of memory addresses from the first portion of memory to the second portion of memory;
an affinity module operable to detect a memory migration event and to respond to the memory migration event by updating affinity information to indicate the first block of memory addresses as being local to the second node.
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Accused Products
Abstract
An information handling system includes a first node and a second node. Each node includes a processor and a local system memory. An interconnect between the first node and the second node enables a processor on the first node to access system memory on the second node. The system includes affinity information that is indicative of a proximity relationship between portions of system memory and the system nodes. A BIOS module migrates a block from one node to another, reloads BIOS-visible affinity tables, and reprograms memory address decoders before calling an operating system affinity module. The affinity module modifies the operating system visible affinity information. The operating system then has accurate affinity information with which to allocate processing threads so that a thread is allocated to a node where memory accesses issued by thread are local accesses.
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Citations
20 Claims
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1. An information handling system, comprising:
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a first node and a second node, wherein each node includes a processor and a local system memory accessible to the processor via a memory bus;
an interconnect between the first node and the second node enabling the processor on the first node to access the system memory on the second node;
an affinity table, stored in a computer readable medium, and indicative of node locations associated with selected portions of memory;
a memory migration module operable to copy contents of a first portion of memory on the first node to a second portion of memory on the second node and to reassign a first block of memory addresses from the first portion of memory to the second portion of memory;
an affinity module operable to detect a memory migration event and to respond to the memory migration event by updating affinity information to indicate the first block of memory addresses as being local to the second node. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer program product comprising instructions, stored on a computer readable medium, for maintaining an affinity structure in an information handling system, comprising:
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responsive to a memory migration event, instructions for modifying an affinity table storing data indicative of a node location of a corresponding portion of system memory;
instructions for notifying an operating system of the memory migration event; and
responsive to said notifying, instructions for updating operating system affinity information to reflect said affinity table. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method for maintaining an affinity structure in an information handling system, comprising:
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responsive to a memory migration event, modifying an affinity table storing data indicative of a node location of a corresponding portion of system memory;
notifying an operating system of the memory migration event; and
responsive to said notifying, updating operating system affinity information to reflect said affinity table. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification