SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS
First Claim
1. A semiconductor integrated circuit apparatus comprising:
- a first function block that has a first clock generation circuit that generates a first system clock that is supplied to circuitry in a function block, and first internal memory in which data is read/written by means of said first system clock; and
a second function block that has a second clock generation circuit that generates a second system clock that is supplied to circuitry in a function block, and second internal memory in which data is read/written by means of said second system clock;
wherein said first function block has a first selection section that selects said first system clock or said second system clock, and supplies that selected clock to said first internal memory.
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Accused Products
Abstract
A semiconductor integrated circuit apparatus that enables function blocks in a semiconductor integrated circuit freely to vary power supply voltage and system clock frequency on the time axis, and also to exchange data among themselves. In a semiconductor integrated circuit apparatus 100, a first function block 110 has a first clock generation circuit 111 that generates a first system clock supplied to circuitry in a function block, first internal memory 112 in which data is read/written by means of the first system clock, and a selector 113 that selects the first system clock or a second system clock and supplies the selected clock to first internal memory 112. A clock selected by selector 113 from the first system clock or the second system clock is supplied as the clock supplied to first internal memory 112.
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Citations
11 Claims
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1. A semiconductor integrated circuit apparatus comprising:
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a first function block that has a first clock generation circuit that generates a first system clock that is supplied to circuitry in a function block, and first internal memory in which data is read/written by means of said first system clock; and a second function block that has a second clock generation circuit that generates a second system clock that is supplied to circuitry in a function block, and second internal memory in which data is read/written by means of said second system clock; wherein said first function block has a first selection section that selects said first system clock or said second system clock, and supplies that selected clock to said first internal memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification