METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
First Claim
1. A method of manufacturing a semiconductor device, the method comprising:
- forming a conductive film over a first semiconductor and a second semiconductor with an insulating film therebetween;
forming a rectangular first resist pattern on the conductive film over the first semiconductor;
forming a second resist pattern on the conductive film over the second semiconductor by using a photomask having a diffraction grating pattern or a reticle having a diffraction grating pattern, wherein a thickness of an edge portion of the second resist pattern is smaller than a thickness of a middle portion of the second resist pattern;
forming a rectangular first gate electrode over the first semiconductor by dry etching using the first resist pattern; and
forming a second gate electrode by dry etching using the second resist pattern over the second semiconductor, wherein a thickness of an edge portion of the second gate electrode is smaller than a thickness of a middle portion of the second gate electrode;
introducing an impurity element into the first semiconductor with the first gate electrode as a mask to form a first impurity region in the first semiconductor, wherein the first impurity region is not overlapped with the first gate electrode; and
introducing the impurity element into the second semiconductor with the second gate electrode as a mask to form a second impurity region and a third impurity region in the second semiconductor, wherein the second impurity region is not overlapped with the second gate electrode and the third impurity region is overlapped with the edge portion of the second gate electrode.
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Abstract
Formation of LDD structures and GOLD structures in a semiconductor device is conventionally performed in a self aligning manner with gate electrodes as masks, but there are many cases in which the gate electrodes have two layer structures, and film formation processes and etching processes become complex. Further, in order to perform formation of LDD structures and GOLD structures only by processes such as dry etching, the transistor structures all have the same structure, and it is difficult to form LDD structures, GOLD structures, and single drain structures separately for different circuits. By applying a photolithography process for forming gate electrodes to photomasks or reticles, in which supplemental patterns having a function of reducing the intensity of light and composed of diffraction grating patterns or translucent films, are established, GOLD structure, LDD structure, and single drain structure transistors can be easily manufactured for different circuits through dry etching and ion injection process steps.
33 Citations
24 Claims
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1. A method of manufacturing a semiconductor device, the method comprising:
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forming a conductive film over a first semiconductor and a second semiconductor with an insulating film therebetween;
forming a rectangular first resist pattern on the conductive film over the first semiconductor;
forming a second resist pattern on the conductive film over the second semiconductor by using a photomask having a diffraction grating pattern or a reticle having a diffraction grating pattern, wherein a thickness of an edge portion of the second resist pattern is smaller than a thickness of a middle portion of the second resist pattern;
forming a rectangular first gate electrode over the first semiconductor by dry etching using the first resist pattern; and
forming a second gate electrode by dry etching using the second resist pattern over the second semiconductor, wherein a thickness of an edge portion of the second gate electrode is smaller than a thickness of a middle portion of the second gate electrode;
introducing an impurity element into the first semiconductor with the first gate electrode as a mask to form a first impurity region in the first semiconductor, wherein the first impurity region is not overlapped with the first gate electrode; and
introducing the impurity element into the second semiconductor with the second gate electrode as a mask to form a second impurity region and a third impurity region in the second semiconductor, wherein the second impurity region is not overlapped with the second gate electrode and the third impurity region is overlapped with the edge portion of the second gate electrode. - View Dependent Claims (5, 9, 13, 17, 21)
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2. A method of manufacturing a semiconductor device, the method comprising:
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forming a conductive film over a first semiconductor and a second semiconductor with an insulating film therebetween;
forming a rectangular first resist pattern on the conductive film over the first semiconductor;
forming a second resist pattern on the conductive film over the second semiconductor by using a photomask having a diffraction grating pattern or a reticle having a diffraction grating pattern, wherein a thickness of an edge portion of the second resist pattern is smaller than a thickness of a middle portion of the second resist pattern;
forming a rectangular first gate electrode over the first semiconductor by dry etching using the first resist pattern;
forming a second gate electrode by dry etching using the second resist pattern over the second semiconductor, wherein a thickness of an edge portion of the second gate electrode is smaller than a thickness of a middle portion of the second gate electrode;
introducing an impurity element into the first semiconductor with the first gate electrode as a mask to form a first impurity region in the first semiconductor, wherein the first impurity region is not overlapped with the first gate electrode;
introducing the impurity element into the second semiconductor with the second gate electrode as a mask to form a second impurity region in the second semiconductor, wherein the second impurity region is not overlapped with the second gate electrode;
removing the first and the second resist patterns;
forming a third resist pattern covering the first gate electrode;
introducing the impurity element into the first semiconductor with the third resist pattern as a mask to form a third impurity region in the first semiconductor, wherein the third impurity region is not overlapped with the third resist pattern and the first gate electrode; and
introducing the impurity element into the second semiconductor with the second gate electrode as a mask to form a fourth impurity region and a fifth impurity region in the second semiconductor, wherein the fourth impurity region is not overlapped with the second gate electrode and the fifth impurity region is overlapped with the edge portion of the second gate electrode. - View Dependent Claims (6, 10, 14, 18, 22)
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3. A method of manufacturing a semiconductor device, the method comprising:
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forming a conductive film over a first semiconductor and a second semiconductor with an insulating film therebetween;
forming a rectangular first resist pattern on the conductive film over the first semiconductor;
forming a second resist pattern on the conductive film over the second semiconductor by using a photomask having a translucent film portion or a reticle having a translucent film portion, wherein a thickness of an edge portion of the second resist pattern is smaller than a thickness of a middle portion of the second resist pattern;
forming a rectangular first gate electrode over the first semiconductor by dry etching using the first resist pattern;
forming a second gate electrode by dry etching using the second resist pattern over the second semiconductor wherein a thickness of an edge portion of the second gate electrode is smaller than a thickness of a middle portion of the second gate electrode;
introducing an impurity element into the first semiconductor with the first gate electrode as a mask to form a first impurity region in the first semiconductor, wherein the first impurity region is not overlapped with the first gate electrode; and
introducing the impurity element into the second semiconductor with the second gate electrode as a mask to form a second impurity region and a third impurity region in the second semiconductor, wherein the second impurity region is not overlapped with the second gate electrode and the third impurity region is overlapped with the edge portion of the second gate electrode. - View Dependent Claims (7, 11, 15, 19, 23)
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4. A method of manufacturing a semiconductor device, the method comprising:
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forming a conductive film over a first semiconductor and a second semiconductor with an insulating film therebetween;
forming a rectangular first resist pattern on the conductive film over the first semiconductor;
forming a second resist pattern on the conductive film over the second semiconductor by using a photomask having a translucent film portion or a reticle having a translucent film portion, wherein a thickness of an edge portion of the second resist pattern is smaller than a thickness of a middle portion of the second resist pattern;
forming a rectangular first gate electrode over the first semiconductor by dry etching using the first resist pattern;
forming a second gate electrode by dry etching using the second resist pattern over the second semiconductor, wherein a thickness of an edge portion of the second gate electrode is smaller than a thickness of a middle portion of the second gate electrode;
introducing an impurity element into the first semiconductor with the first gate electrode as a mask to form a first impurity region in the first semiconductor, wherein the first impurity region is not overlapped with the first gate electrode, and introducing the impurity element into the second semiconductor with the second gate electrode as a mask to form a second impurity region in the second semiconductor, wherein the second impurity region is not overlapped with the second gate electrode;
removing the first and the second resist patterns;
forming a third resist pattern covering the first gate electrode;
introducing the impurity element into the first semiconductor with the third resist pattern as a mask to form a third impurity region in the first semiconductor, wherein the third impurity region is not overlapped with the third resist pattern and the first gate electrode;
introducing the impurity element into the second semiconductor with the second gate electrode as a mask to form a fourth impurity region and a fifth impurity region in the second semiconductor, wherein the fourth impurity region is not overlapped with the second gate electrode and the fifth impurity region is overlapped with the edge portion of the second gate electrode. - View Dependent Claims (8, 12, 16, 20, 24)
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Specification