Frequency calibration for a monolithic clock generator and timing/frequency reference

• US 20070222529A1
• Filed: 05/23/2007
• Published: 09/27/2007
• Est. Priority Date: 03/22/2004
• Status: Active Grant

• Current Assignee: Integrated Device Technology Incorporated (Renesas Electronics Corporation)
• Original Assignee: Mobius Microsystems, Inc. (Renesas Electronics Corporation)
• Inventors: Kubba, Sundus, Carichner, Gordon, Pernia, Scott, McCorquodale, Michael
• Granted Patent: US 7,548,125 B2
• Time in Patent Office: Days
• US Class Current: 331/44
• CPC Class Codes: G01R 23/15 Indicating that frequency of pulses is either above or below a predetermined value or within or outside a predetermined range of values, by making use of non-linear or digital elements (indicating that pulse width is above or below a certain limit)
• CPC Class Codes: H03L 1/00 Stabilisation of generator output against variations of physical values, e.g. power supply
• CPC Class Codes: H03L 1/022 by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature H03L1/021 takes precedence
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop

Abstract

Exemplary embodiments of the invention provide a system, method and apparatus for frequency calibration of a free-running, reference harmonic oscillator. An exemplary system comprises the harmonic oscillator, a frequency divider, a comparator, and a reactance modulator. The reference harmonic oscillator includes a plurality of switchable reactance modules controlled by corresponding coefficients, and provides an oscillation signal having an oscillation frequency, which is divided or multiplied by the frequency divider to provide an output signal having an output frequency. The comparator compares the output frequency to an externally supplied reference frequency using first and second predetermined levels of discrimination, and provides first or second comparison signals when the output frequency is higher or lower than the reference frequency. The reactance modulator determines a plurality of coefficients to control switching of the plurality of switchable reactance modules to increase or decrease a reactance of the oscillator in response to the first and second comparison signals.

Claims

1. A method for frequency calibration of a reference oscillator, the reference oscillator having a plurality of switchable reactance modules, the reference oscillator providing an oscillation signal, the method comprising:

using the oscillation signal, providing an output signal having an output frequency;

using a first predetermined level of discrimination, comparing the output frequency to a reference frequency;

providing a first comparison signal when the output frequency is higher than the reference frequency;

providing a second comparison signal when the output frequency is lower than the reference frequency; and

determining a plurality of coefficients to control switching of the plurality of switchable reactance modules to increase a reactance of the reference oscillator in response to the first comparison signal or to decrease the reactance of the reference oscillator in response to the second comparison signal.

2. The method of claim 1, wherein the step of providing the output signal further comprises:

using the oscillation signal having an oscillation frequency, multiplying or dividing the oscillation frequency by a rational number to provide the output signal having the output frequency.

3. The method of claim 1, wherein the comparing step further comprises:

counting cycles of the output signal and the reference signal;

determining when a first predetermined terminal count has been reached by the reference signal; and

determining a difference between an output signal count and the first predetermined terminal count.

4. The method of claim 1, wherein the comparing step further comprises:

counting cycles of the output signal and the reference signal;

determining when a first predetermined terminal count has been reached by the output signal; and

determining a difference between a reference signal count and the first predetermined terminal count.

5. The method of claim 1, wherein the comparing step further comprises:

counting cycles of the output signal during a predetermined period of time; and

determining a remainder as a difference between an output signal count and a predetermined reference count.

6. The method of claim 5, further comprising:

following the comparison, determining a lowest remainder and storing a corresponding plurality of coefficients which produced the output frequency having the lowest remainder.

7. The method of claim 6, further comprising:

following a last comparison, selecting the plurality of coefficients which produced the output frequency having the lowest remainder and providing the plurality of coefficients as the frequency calibration of the reference oscillator.

8. The method of claim 1, further comprising:

counting cycles of the output signal and the reference signal; and

determining a remainder as a cycle count difference between the reference frequency and the output frequency.

9. The method of claim 8, further comprising:

following the comparison, determining a lowest remainder and storing a corresponding plurality of coefficients which produced the output frequency having the lowest remainder.

10. The method of claim 9, further comprising:

following a last comparison, selecting the plurality of coefficients which produced the output frequency having the lowest remainder and providing the plurality of coefficients as the frequency calibration of the reference oscillator.

11. The method of claim 1, further comprising:

using a second predetermined level of discrimination, comparing the output frequency to the reference frequency and providing the first comparison signal when the output frequency is higher than the reference frequency or providing the second comparison signal when the output frequency is lower than the reference frequency.

12. The method of claim 11, wherein the comparing step further comprises:

counting cycles of the output signal and the reference signal;

determining when a second predetermined terminal count has been reached by the reference signal; and

determining a difference between an output signal count and the second predetermined terminal count.

13. The method of claim 11, wherein the comparing step further comprises:

counting cycles of the output signal and the reference signal;

determining when a second predetermined terminal count has been reached by the output signal; and

determining a difference between a reference signal count and the second predetermined terminal count.

14. The method of claim 11, wherein the comparing step further comprises:

counting cycles of the output signal during a predetermined period of time; and

determining a remainder as a difference between an output signal count and a second predetermined reference count.

15. The method of claim 1, further comprising:

for each comparison, providing the plurality of coefficients in binary search increments or in sequential increments.

16. The method of claim 1, further comprising:

selecting a first plurality of coefficients and a second plurality of coefficients, the second plurality of coefficients being an adjacent state of the first plurality of coefficients;

using a second predetermined level of discrimination and the first plurality of coefficients, performing a first comparison of the output frequency to the reference frequency by correspondingly counting cycles of the output signal and the reference signal to form a plurality of corresponding counts until a corresponding count of the plurality of corresponding counts has a first transition to the second predetermined level of discrimination; and

using the second predetermined level of discrimination and the second plurality of coefficients, and commencing with the previous corresponding counts, performing a second comparison of the output frequency to the reference frequency by correspondingly counting cycles of the output signal and the reference signal until a corresponding count of the plurality of corresponding counts has a second transition to the second predetermined level of discrimination.

17. The method of claim 16, further comprising:

when the output signal provided using the first plurality of coefficients has a frequency higher than the output signal provided using the second plurality of coefficients, and when the reference signal corresponding count has provided the second transition, selecting the first plurality of coefficients as the frequency calibration of the oscillator, and when the output signal corresponding count has provided the second transition, selecting the second plurality of coefficients as the frequency calibration of the oscillator.

18. The method of claim 16, further comprising:

when the output signal provided using the first plurality of coefficients has a frequency lower than the output signal provided using the second plurality of coefficients, and when the reference signal corresponding count has provided the second transition, selecting the first plurality of coefficients as the frequency calibration of the oscillator, and when the output signal corresponding count has provided the second transition, selecting the second plurality of coefficients as the frequency calibration of the oscillator.

19. A frequency calibration system, the system couplable to an oscillator to receive a reference signal having a reference frequency, the system comprising:

a reference oscillator comprising a plurality of switchable reactance modules and a coefficient register, the reference oscillator adapted to provide an oscillation signal having an oscillation frequency;

a frequency divider couplable to the reference oscillator, the frequency divider adapted to provide an output signal having an output frequency;

a comparator coupled to the frequency divider, the comparator adapted to compare the output frequency to the reference frequency using a first predetermined level of discrimination, to provide first comparison signal when the output frequency is higher than the reference frequency, and to provide a second comparison signal when the output frequency is lower than the reference frequency; and

a reactance modulator coupled to the comparator and couplable to the reference oscillator, the reactance modulator adapted to determine and provide to the coefficient register a plurality of coefficients to control switching of the plurality of switchable reactance modules to increase a reactance of the oscillator in response to the first comparison signal or to decrease the reactance of the oscillator in response to the second comparison signal.

20. The system of claim 19, wherein the frequency divider is further adapted to multiply or divide the oscillation frequency by a rational number to provide the output signal having the output frequency.

21. The system of claim 19, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal;

a second counter adapted to count cycles of the reference signal; and

a state detector coupled to the first and second counters, the state detector adapted to determine when a first predetermined terminal count has been reached by the reference signal and to determine a difference between an output signal count and the first predetermined terminal count.

22. The system of claim 19, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal;

a second counter adapted to count cycles of the reference signal; and

a state detector coupled to the first and second counters, the state detector adapted to determine when a first predetermined terminal count has been reached by the output signal and to determine a difference between a reference signal count and the first predetermined terminal count.

23. The system of claim 19, wherein the comparator is further adapted to count cycles of the output signal and the reference signal and to determine a remainder as a cycle count difference between a first predetermined terminal count and either a reference frequency count or an output frequency count.

24. The system of claim 23, wherein the comparator further comprises:

a remainder register; and

a remainder comparator, the remainder comparator adapted to compare a first remainder with a second remainder, to determine a lowest remainder, and to store in the remainder register the plurality of coefficients which produced the output frequency having the lowest remainder.

25. The system of claim 24, wherein the reactance modulator is further adapted to select the plurality of coefficients which produced the output frequency having the lowest remainder and provide the plurality of coefficients as the frequency calibration of the oscillator.

26. The system of claim 19, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal; and

a state detector coupled to the first counter, the state detector adapted to determine a remainder as a difference between an output signal count and a predetermined reference count.

27. The system of claim 26, wherein the comparator further comprises:

a remainder register; and

a remainder comparator, the remainder comparator adapted to compare a first remainder with a second remainder, to determine a lowest remainder, and to store in the remainder register the plurality of coefficients which produced the output frequency having the lowest remainder.

28. The system of claim 27, wherein the reactance modulator is further adapted to select the plurality of coefficients which produced the output frequency having the lowest remainder and provide the plurality of coefficients as the frequency calibration of the oscillator.

29. The system of claim 19, wherein the comparator is further adapted to compare the output frequency to the reference frequency using a second predetermined level of discrimination, and to provide the first comparison signal when the output frequency is higher than the reference frequency or provide the second comparison signal when the output frequency is lower than the reference frequency.

30. The system of claim 29, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal;

a second counter adapted to count cycles of the reference signal; and

a state detector coupled to the first and second counters, the state detector adapted to determine when a second predetermined terminal count has been reached by the reference signal and to determine a difference between an output signal count and the second predetermined terminal count.

31. The system of claim 29, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal;

a second counter adapted to count cycles of the reference signal; and

a state detector coupled to the first and second counters, the state detector adapted to determine when a second predetermined terminal count has been reached by the output signal and to determine a difference between a reference signal count and the second predetermined terminal count.

32. The system of claim 29, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal; and

a state detector coupled to the first counter, the state detector adapted to determine a remainder as a difference between an output signal count and a second predetermined reference count.

33. The system of claim 19, wherein the reactance modulator is further adapted to provide the plurality of coefficients in binary search increments or in sequential increments.

34. The system of claim 19, wherein the comparator is further adapted to select a first plurality of coefficients and a second plurality of coefficients, the second plurality of coefficients being an adjacent state of the first plurality of coefficients;

to use a second predetermined level of discrimination and the first plurality of coefficients to perform a first comparison of the output frequency to the reference frequency by correspondingly counting cycles of the output signal and the reference signal to form a plurality of corresponding counts until a corresponding count of the plurality of corresponding counts has a first transition to the second predetermined level of discrimination; and

to use the second predetermined level of discrimination and the second plurality of coefficients, and commencing with the previous corresponding counts, to perform a second comparison of the output frequency to the reference frequency by correspondingly counting cycles of the output signal and the reference signal until a corresponding count of the plurality of corresponding counts has a second transition to the second predetermined level of discrimination.

35. The system of claim 34, wherein the reactance modulator is further adapted, when the output signal provided using the first plurality of coefficients has a frequency higher than the output signal provided using the second plurality of coefficients, and when the reference signal corresponding count has provided the second transition, to select the first plurality of coefficients as the frequency calibration of the oscillator, and when the output signal corresponding count has provided the second transition, to select the second plurality of coefficients as the frequency calibration of the oscillator.

36. The system of claim 34, wherein the reactance modulator is further adapted, when the output signal provided using the first plurality of coefficients has a frequency lower than the output signal provided using the second plurality of coefficients, and when the reference signal corresponding count has provided the second transition, to select the first plurality of coefficients as the frequency calibration of the oscillator, and when the output signal corresponding count has provided the second transition, to select the second plurality of coefficients as the frequency calibration of the oscillator.

37. The system of claim 19, wherein each switchable reactance module of the plurality of switchable reactance modules further comprises a first fixed reactance and a second fixed reactance, and wherein each switchable reactance module is responsive to a corresponding coefficient of the plurality of coefficients to switch between the first fixed reactance and the second fixed reactance.

38. The system of claim 19, wherein each switchable reactance module of the plurality of switchable reactance modules further comprises a variable reactance responsive to a control voltage, and wherein each switchable reactance module of the plurality of switchable reactance modules is responsive to a corresponding coefficient of the plurality of coefficients to select the control voltage.

39. An apparatus for frequency calibration of a free-running, reference harmonic oscillator, the oscillator adapted to provide an oscillation signal having an oscillation frequency, the oscillator having a coefficient register, the apparatus couplable to receive a reference signal having a reference frequency, the apparatus comprising:

a frequency divider couplable to the oscillator, the frequency divider adapted to provide an output signal having an output frequency;

a comparator coupled to the frequency divider, the comparator adapted to compare the output frequency to the reference frequency using a first predetermined level of discrimination, to provide first comparison signal when the output frequency is higher than the reference frequency, and to provide a second comparison signal when the output frequency is lower than the reference frequency; and

a reactance modulator coupled to the comparator and couplable to the reference oscillator, the reactance modulator adapted to determine and provide to the coefficient register a plurality of coefficients to control switching of the plurality of switchable reactance modules to increase a reactance of the oscillator in response to the first comparison signal or to decrease the reactance of the oscillator in response to the second comparison signal.

40. The apparatus of claim 39, wherein the frequency divider is further adapted to multiply or divide the oscillation frequency by a rational number to provide the output signal having the output frequency.

41. The apparatus of claim 39, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal;

a second counter adapted to count cycles of the reference signal; and

a state detector coupled to the first and second counters, the state detector adapted to determine when a first predetermined terminal count has been reached by the reference signal and to determine a difference between an output signal count and the first predetermined terminal count.

42. The apparatus of claim 39, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal;

a second counter adapted to count cycles of the reference signal; and

a state detector coupled to the first and second counters, the state detector adapted to determine when a first predetermined terminal count has been reached by the output signal and to determine a difference between a reference signal count and the first predetermined terminal count.

43. The apparatus of claim 39, wherein the comparator is further adapted to count cycles of the output signal and the reference signal and to determine a remainder as a cycle count difference between a first predetermined terminal count and either a reference frequency count or an output frequency count.

44. The apparatus of claim 43, wherein the comparator further comprises:

a remainder register; and

a remainder comparator, the remainder comparator adapted to compare a first remainder with a second remainder, to determine a lowest remainder, and to store in the remainder register the plurality of coefficients which produced the output frequency having the lowest remainder.

45. The apparatus of claim 44, wherein the reactance modulator is further adapted to select the plurality of coefficients which produced the output frequency having the lowest remainder and provide the plurality of coefficients as the frequency calibration of the oscillator.

46. The apparatus of claim 39, wherein the comparator is further adapted to count cycles of the output signal and to determine a remainder as a cycle count difference between an output signal count and a predetermined reference count.

47. The apparatus of claim 39, wherein the comparator is further adapted to compare the output frequency to the reference frequency using a second predetermined level of discrimination, and to provide the first comparison signal when the output frequency is higher than the reference frequency or provide the second comparison signal when the output frequency is lower than the reference frequency.

48. The apparatus of claim 47, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal;

a second counter adapted to count cycles of the reference signal; and

a state detector coupled to the first and second counters, the state detector adapted to determine when a second predetermined terminal count has been reached by the reference signal and to determine a difference between an output signal count and the second predetermined terminal count.

49. The apparatus of claim 47, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal;

a second counter adapted to count cycles of the reference signal; and

a state detector coupled to the first and second counters, the state detector adapted to determine when a second predetermined terminal count has been reached by the output signal and to determine a difference between a reference signal count and the second predetermined terminal count.

50. The apparatus of claim 47, wherein the comparator further comprises:

a first counter adapted to count cycles of the output signal; and

a state detector coupled to the first counter, the state detector adapted to determine a remainder as a difference between an output signal count and a predetermined reference count.

51. The apparatus of claim 39, wherein the reactance modulator is further adapted to provide the plurality of coefficients in binary search increments or in sequential increments.

52. The apparatus of claim 39, wherein the comparator is further adapted to select a first plurality of coefficients and a second plurality of coefficients, the second plurality of coefficients being an adjacent state of the first plurality of coefficients;

to use a second predetermined level of discrimination and the first plurality of coefficients to perform a first comparison of the output frequency to the reference frequency by correspondingly counting cycles of the output signal and the reference signal to form a plurality of corresponding counts until a corresponding count of the plurality of corresponding counts has a first transition to the second predetermined level of discrimination; and

to use the second predetermined level of discrimination and the second plurality of coefficients, and commencing with the previous corresponding counts, to perform a second comparison of the output frequency to the reference frequency by correspondingly counting cycles of the output signal and the reference signal until a corresponding count of the plurality of corresponding counts has a second transition to the second predetermined level of discrimination.

53. The apparatus of claim 52, wherein the reactance modulator is further adapted, when the output signal provided using the first plurality of coefficients has a frequency higher than the output signal provided using the second plurality of coefficients, and when the reference signal corresponding count has provided the second transition, to select the first plurality of coefficients as the frequency calibration of the oscillator, and when the output signal corresponding count has provided the second transition, to select the second plurality of coefficients as the frequency calibration of the oscillator.

54. The apparatus of claim 52, wherein the reactance modulator is further adapted, when the output signal provided using the first plurality of coefficients has a frequency lower than the output signal provided using the second plurality of coefficients, and when the reference signal corresponding count has provided the second transition, to select the first plurality of coefficients as the frequency calibration of the oscillator, and when the output signal corresponding count has provided the second transition, to select the second plurality of coefficients as the frequency calibration of the oscillator.

55. The apparatus of claim 39, wherein the reactance modulator is further adapted to modify an impedance of the oscillator in response to the first comparison signal or in response to the second comparison signal.

56. The apparatus of claim 39, wherein the reactance modulator is further adapted to modify a resistance of the oscillator in response to the first comparison signal or in response to the second comparison signal.

57. A frequency calibration system, the system couplable to a first reference oscillator to receive a reference signal having a reference frequency, the system comprising:

a harmonic oscillator adapted to be an independent, calibrated reference oscillator, the harmonic oscillator comprising a plurality of switchable reactance modules and a coefficient register, the harmonic oscillator adapted to provide an oscillation signal having an oscillation frequency;

a frequency divider coupled to the harmonic oscillator, the frequency divider adapted to provide an output signal having an output frequency which is a rational multiple or fraction of the oscillation frequency;

a comparator coupled to the frequency divider, the comparator adapted to compare the output frequency to the reference frequency using a first predetermined level of discrimination, to compare the output frequency to the reference frequency using a second predetermined level of discrimination, and to provide a first comparison signal when the output frequency is higher than the reference frequency or provide a second comparison signal when the output frequency is lower than the reference frequency, the comparator further adapted to determine a remainder as a cycle count difference between the reference frequency and the output frequency, to determine a lowest remainder, and to store a corresponding plurality of coefficients which produced the output frequency having the lowest remainder; and

a reactance modulator coupled to the comparator and to the oscillator, the reactance modulator adapted to determine and provide to the coefficient register a plurality of coefficients to control switching of the plurality of switchable reactance modules to increase a reactance of the oscillator in response to the first comparison signal or to decrease the reactance of the oscillator in response to the second comparison signal, the reactance modulator further adapted to select the plurality of coefficients which produced the output frequency having the lowest remainder and provide the plurality of coefficients as the frequency calibration of the harmonic oscillator.