Analog vertical sub-sampling in an active pixel sensor (APS) image sensor

• US 20070228256A1
• Filed: 03/31/2006
• Published: 10/04/2007
• Est. Priority Date: 03/31/2006
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Myers, Charles, Mentzer, Ray, Borg, Matthew, Beck, Jeffery, DeMonte, Frank
• Granted Patent: US 7,342,212 B2
• Time in Patent Office: Days
• US Class Current: 250/208.100
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 25/78 Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Abstract

An active pixel sensor (APS) image sensor comprises an array of pixel circuits corresponding to rows and columns of pixels, a plurality of amplifiers that buffer signals output by the array of pixel circuits, and a plurality of sample and hold circuits that read the buffered signals. A routing mechanism is positioned between the array of pixel circuits and the plurality of amplifiers. A controller selects a set of the pixel circuits for sampling and is configured to control the routing mechanism to couple each pixel circuit in the set to a different one of the amplifiers during a normal mode of operation and to couple each pixel circuit of a subset of pixel circuits in a first set of pixel circuits to a different amplifier of a first subset of the amplifiers, to couple each pixel circuit of a subset of pixel circuits in a second set of pixel circuits to a different amplifier of a second subset of the amplifiers, and to connect the amplifiers of the first and second subsets of amplifiers in pairs to a common one of the sample and hold circuits during a sub-sampling mode of operation.

Claims

1. An active pixel sensor (APS) image sensor comprising:

an array of pixel circuits corresponding to rows and columns of pixels;

a plurality of amplifiers that buffer signals output by the array of pixel circuits;

a plurality of sample and hold circuits that read the buffered signals;

a routing mechanism positioned between the array of pixel circuits and the plurality of amplifiers; and

a controller that selects sets of the pixels circuits for sampling, the controller configured to control the routing mechanism to couple each pixel circuit in a set to a different one of the amplifiers during a normal mode of operation, and to couple each pixel circuit of a subset of pixel circuits in a first set of pixel circuits to a different amplifier of a first subset of the amplifiers, to couple each pixel circuit of a subset of pixel circuits in a second set of pixel circuits to a different amplifier of a second subset of the amplifiers, and to couple the amplifiers of the first and second subsets of amplifiers in pairs to a common one of the sample and hold circuits during a sub-sampling mode of operation.

2. The image sensor of claim 1, wherein the first set of pixel circuits is a first row of pixel circuits and wherein the second set of pixel circuits is a second row of pixel circuits.

3. The image sensor of claim 2, wherein the pixel circuits of each of the subsets of pixel circuits are in nonadjacent columns.

4. The image sensor of claim 2, wherein the first and second rows of pixel circuits are nonadjacent.

5. The image sensor of claim 4, wherein the pixel circuits of each of the subsets of pixel circuits are in nonadjacent columns.

6. The image sensor of claim 1, wherein the plurality of amplifiers includes an amplifier associated with each column of pixel circuits.

7. The image sensor of claim 1, wherein the controller is configured to control the routing mechanism to connect each pair of the amplifiers to the common sample and hold amplifier for simultaneous reading.

8. The image sensor of claim 1, wherein each of the pixel circuits is associated with one of a plurality of different colors and wherein the pixel circuits of the subset of pixel circuits of the first set of pixel circuits and the pixel circuits of the subset of pixel circuits of the second set of pixel circuits are all associated with a common color.

9. An integrated circuit including an active pixel sensor (APS) image sensor comprising:

an array of pixel circuits corresponding to rows and columns of pixels;

a plurality of amplifiers that buffer signals output by the array of pixel circuits;

a plurality of sample and hold circuits that read the buffered signals;

a routing mechanism positioned between the array of pixel circuits and the plurality of amplifiers; and

a controller that selects sets of the pixels circuits for sampling, the controller configured to control the routing mechanism to couple each pixel circuit in a set to a different one of the amplifiers during a normal mode of operation, and to couple each pixel circuit of a subset of pixel circuits in a first set of pixel circuits to a different amplifier of a first subset of the amplifiers, to couple each pixel circuit of a subset of pixel circuits in a second set of pixel circuits to a different amplifier of a second subset of the amplifiers, and to couple the amplifiers of the first and second subsets of amplifiers in pairs to a common one of the sample and hold circuits during a sub-sampling mode of operation.

10. The integrate circuit of claim 9, wherein the first set of pixel circuits is a first row of pixel circuits and wherein the second set of pixel circuits is a second row of pixel circuits.

11. The integrated circuit of claim 10, wherein the pixel circuits of each of the subsets of pixel circuits are in nonadjacent columns.

12. The integrated circuit of claim 10, wherein the first and second rows of pixel circuits are nonadjacent.

13. The integrated circuit of claim 12, wherein the pixel circuits of each of the subsets of pixel circuits are in nonadjacent columns.

14. The integrated circuit of claim 9, wherein the plurality of amplifiers includes an amplifier associated with each column of pixel circuits.

15. The integrated circuit of claim 9, wherein the controller is configured to control the routing mechanism to connect each pair of the amplifiers to the common sample and hold amplifier for simultaneous reading.

16. The integrated circuit of claim 9, wherein each of the pixel circuits is associated with one of a plurality of different colors and wherein the pixel circuits of the subset of pixel circuits of the first set of pixel circuits and the pixel circuits of the subset of pixel circuits of the second set of pixel circuits are all associated with a common color.

17. An in an active pixel sensor (APS) image sensor including an array of pixel circuits arranged in rows and columns, a plurality of amplifiers that buffer signals output by the array of pixel circuits, and a plurality of sample and hold circuits that read the buffered signals, a sub-sampling mode method comprising:

coupling each pixel circuit of a subset of pixel circuits in a first set of pixel circuits to a different amplifier of a first subset of the amplifiers;

coupling each pixel circuit of a subset of pixel circuits in a second set of pixel circuits to a different amplifier of a second subset of the amplifiers; and

coupling the amplifiers of the first and second subsets of amplifiers in pairs to a common one of the sample and hold circuits during a sub-sampling mode of operation.

18. The method of claim 17, wherein the first set of pixel circuits is a first row of pixel circuits and wherein the second set of pixel circuits is a second row of pixel circuits.

19. The method of claim 18, wherein the first and second rows of pixel circuits are nonadjacent.

20. The method of claim 17 wherein the pixel circuits of each of the subsets of pixel circuits are in nonadjacent columns.