TOP-GATE THIN-FILM TRANSISTORS USING NANOPARTICLES AND METHOD OF MANUFACTURING THE SAME
First Claim
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1. A method of manufacturing thin-film transistors using nanoparticles, comprising the steps of:
- forming a nanoparticle film on a substrate and sintering nanoparticle films on the substrate;
forming source and drain electrodes on the nanoparticle film;
forming a gate dielectric film by depositing a dielectric material on the nanoparticle film with the source and drain electrodes formed thereon; and
forming a top-gate electrode on the gate dielectric film.
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Abstract
The present invention relates to a method of manufacturing thin-film transistors using nanoparticles and thin film transistors manufactured by the method. A hydrophilic buffer layers are deposited on the substrates to facilitate formation of nanoparticle films. Sintered nanoparticles are used as an active layer and dielectric materials of high dielectric coefficient are also used as a gate dielectric layer to form a top gate electrode on the gate dielectric layer, thereby enabling low-voltage operation and low-temperature fabrication.
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Citations
20 Claims
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1. A method of manufacturing thin-film transistors using nanoparticles, comprising the steps of:
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forming a nanoparticle film on a substrate and sintering nanoparticle films on the substrate; forming source and drain electrodes on the nanoparticle film; forming a gate dielectric film by depositing a dielectric material on the nanoparticle film with the source and drain electrodes formed thereon; and forming a top-gate electrode on the gate dielectric film. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. A top-gate thin-film transistor using nanoparticles, comprising:
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a buffer layer formed by depositing a hydrophilic material on a flexible substrate; a nanoparticle film deposited and sintered on the buffer layer; source and drain electrodes formed on the nanoparticle film; a gate dielectric film formed by depositing a dielectric material on the nanoparticle film with the source and drain electrodes formed thereon; and a top-gate electrode formed on the gate dielectric layer.
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Specification