Nonvolatile semiconductor memory device
First Claim
1. A nonvolatile semiconductor memory device comprising:
- a semiconductor substrate, said semiconductor substrate comprising a pair of impurity regions and a channel formation region between said impurity regions;
a floating gate electrode over the channel formation region with a first insulating layer interposed therebetween, anda control gate electrode over the floating gate electrode with a second insulating layer interposed therebetween,wherein the floating gate electrode includes at least a first layer in contact with the first insulating layer, and a second layer over the first layer,wherein the first layer is formed of a semiconductor material,wherein a band gap of the first layer is smaller than a band gap of the channel formation region, andwherein the second layer is formed of a material selected from the group consisting of a metal, a metal alloy, and a metal compound.
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Accused Products
Abstract
An object is to provide a nonvolatile semiconductor memory device which is superior in writing property and charge holding property. A semiconductor substrate in which a channel formation region is formed between a pair of impurity regions is provided, and a first insulating layer, a floating gate electrode, a second insulating layer, and a control gate electrode are provided over the semiconductor substrate. The floating gate electrode includes at least two layers. It is preferable that a band gap of a first floating gate electrode, which is in contact with the first insulating layer, be smaller than that of the semiconductor substrate. It is also preferable that a second floating gate electrode be formed of a metal material, an alloy material, or a metal compound material. This is because, by lowering the bottom energy level of a conduction band of the floating gate electrode than that of the channel formation region in the semiconductor substrate, a carrier injecting property and a charge holding property can be improved.
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Citations
28 Claims
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1. A nonvolatile semiconductor memory device comprising:
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a semiconductor substrate, said semiconductor substrate comprising a pair of impurity regions and a channel formation region between said impurity regions; a floating gate electrode over the channel formation region with a first insulating layer interposed therebetween, and a control gate electrode over the floating gate electrode with a second insulating layer interposed therebetween, wherein the floating gate electrode includes at least a first layer in contact with the first insulating layer, and a second layer over the first layer, wherein the first layer is formed of a semiconductor material, wherein a band gap of the first layer is smaller than a band gap of the channel formation region, and wherein the second layer is formed of a material selected from the group consisting of a metal, a metal alloy, and a metal compound. - View Dependent Claims (5, 6, 7, 8, 9, 10)
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2. A nonvolatile semiconductor memory device comprising:
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a semiconductor substrate, said semiconductor substrate comprising a pair of impurity regions and a channel formation region between said impurity regions; a floating gate electrode over the channel formation region with a first insulating layer therebetween, and a control gate electrode over the floating gate electrode with a second insulating layer interposed therebetween, wherein the floating gate electrode includes at least a first layer and a second layer, wherein the first layer is in contact with the first insulating layer and is formed using a material having a smaller band gap and lower resistivity than the channel formation region, and wherein the second layer is formed of a material selected from the group consisting of a metal, a metal alloy, and a metal compound. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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3. A nonvolatile semiconductor memory device comprising:
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a semiconductor substrate, said semiconductor substrate comprising a pair of impurity regions and a channel formation region between said impurity regions; a floating gate electrode over the channel formation region with a first insulating layer therebetween, and a control gate electrode over the floating gate electrode with a second insulating layer interposed therebetween, wherein the floating gate electrode includes at least a first layer and a second layer, and wherein barrier energy with respect to electrons in the first layer, formed by the first insulating layer, is higher than barrier energy with respect to electrons in the channel formation region, formed by the first insulating layer, and wherein the second layer is formed of a material selected from the group consisting of a metal, a metal alloy, and a metal compound. - View Dependent Claims (17, 18, 19, 20, 21)
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4. A nonvolatile semiconductor memory device comprising:
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a semiconductor substrate, said semiconductor substrate comprising a pair of impurity regions and a channel formation region between said impurity regions; a floating gate electrode over the channel formation region with a first insulating layer therebetween, and a control gate electrode over the floating gate electrode with a second insulating layer interposed therebetween, wherein the floating gate electrode includes at least a first layer and a second layer, wherein the first layer which is in contact with the first insulating layer is formed of germanium or a germanium compound, and wherein the second layer is formed of a material selected from the group consisting of a metal, a metal alloy, and a metal compound. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28)
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Specification