METHOD TO IMPROVE THE STEP COVERAGE AND PATTERN LOADING FOR DIELECTRIC FILMS

• US 20070232071A1
• Filed: 03/29/2007
• Published: 10/04/2007
• Est. Priority Date: 03/31/2006
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Xia, Li-Qun, Balseanu, Mihaela, M'Saad, Hichem, Shek, Mei-Yee
• Granted Patent: US 7,780,865 B2
• Time in Patent Office: Days
• US Class Current: 438/694
• CPC Class Codes: H01L 21/02123 the material containing silicon
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/3185 of siliconnitrides
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence

Abstract

Methods of controlling the step coverage and pattern loading of a layer on a substrate are provided. The dielectric layer may be a silicon nitride, silicon oxide, or silicon oxynitride layer. The method comprises depositing a dielectric layer on a substrate having at least one formed feature across a surface of the substrate and etching the dielectric layer with a plasma from oxygen or a halogen-containing gas to provide a desired profile of the dielectric layer on the at least one formed feature. The deposition of the dielectric layer and the etching of the dielectric layer may be repeated for multiple cycles to provide the desired profile of the dielectric layer.

Claims

1. A method of controlling the step coverage and pattern loading of a layer on a substrate, comprising:

placing a substrate with at least one formed feature across a surface of the substrate into a chamber;

depositing a dielectric layer on the substrate; and

etching the dielectric layer with a plasma from oxygen or a halogen-containing gas selected from the group consisting of fluorine, chlorine, bromine, and combinations thereof to provide a desired profile of the dielectric layer on the at least one formed feature.

2. The method of claim 1, wherein the depositing a dielectric layer and the etching the dielectric layer with a plasma are performed in the same chamber.

3. The method of claim 1, wherein the feature comprises a top surface, a sidewall surface, and a bottom surface, the dielectric layer is deposited to a greater thickness on the top surface than on the bottom surface and sidewall surface, and the dielectric layer is etched at a higher etch rate on the top surface than on the bottom surface and the sidewall surface.

4. The method of claim 3, wherein the etch rate of the dielectric layer on the top surface is at least 10% higher than the etch rate of the dielectric layer on the sidewall surface or the bottom surface.

5. The method of claim 1, wherein the plasma is generated by RF power in the chamber.

6. The method of claim 5, wherein the RF power has a single frequency between about 100 kHz and about 1 MHz.

7. The method of claim 5, wherein the RF power has a single frequency between about 1 MHz and about 13.56 MHz.

8. The method of claim 5, wherein the RF power comprises a first frequency between about 100 kHz and about 1 MHz and a second frequency between about 1 MHz and about 13.56 MHz.

9. The method of claim 1, wherein the plasma is generated by a remote plasma source.

10. The method of claim 1, wherein the depositing a dielectric layer and the etching the dielectric layer are performed in separate chambers that are connected by a transfer chamber.

11. A method of controlling the step coverage and pattern loading of a layer on a substrate, comprising:

placing a substrate with at least one formed feature across a surface of the substrate into a chamber, wherein the feature comprises a top surface, a sidewall surface, and a bottom surface;

depositing a dielectric layer on the substrate, wherein the dielectric layer is deposited to a greater thickness on the top surface than on the bottom surface and sidewall surface;

etching the dielectric layer with a plasma from oxygen or a halogen-containing gas selected from the group consisting of fluorine, chlorine, bromine, and combinations thereof at a higher etch rate on the top surface than on the sidewall surface and bottom surface; and

repeating the depositing a dielectric layer and the etching the dielectric layer with a plasma to provide a desired profile of the dielectric layer on the at least one formed feature.

12. The method of claim 11, wherein the depositing a dielectric layer and the etching the dielectric layer are performed in the same chamber or in separate chambers that are connected by a transfer chamber.

13. The method of claim 11, wherein the etch rate of the dielectric layer on the top surface is at least 10% higher than the etch rate of the dielectric layer on the sidewall surface or the bottom surface.

14. The method of claim 11, wherein the repeating of the depositing a dielectric layer and the etching the dielectric layer with a plasma is performed between 1 and 100 times.

15. The method of claim 11, wherein the dielectric layer is a SiO, SiN, SiCN, SiOC, SiOCN, SiBN, SiBCN, SiC, BN, or BCN layer.

16. The method of claim 11, wherein the etching the dielectric layer occurs for at least about 0.1 seconds.

17. A method of controlling the step coverage and pattern loading of a layer on a substrate, comprising:

placing a substrate with at least one formed feature across a surface of the substrate into a chamber, wherein the feature comprises a top surface, a sidewall surface, and a bottom surface;

depositing a silicon nitride dielectric layer on the substrate wherein the silicon nitride dielectric layer is deposited to a greater thickness on the top surface than on the bottom surface and sidewall surface; and

etching the silicon nitride dielectric layer with a NF₃ plasma at a higher etch rate on the top surface than on the sidewall surface and bottom surface to provide a desired profile of the silicon nitride dielectric layer on the at least one formed feature.

18. The method of claim 17, wherein the etch rate of the dielectric layer on the top surface is at least 10% higher than the etch rate of the dielectric layer on the sidewall surface or the bottom surface.

19. The method of claim 17, wherein the NF₃ plasma is generated by RF power in the chamber.

20. The method of claim 17, wherein the etching the silicon nitride dielectric layer occurs for about 0.1 seconds to about 45 seconds.