Storage system using flash memories, wear-leveling method for the same system and wear-leveling program for the same system

• US 20070233931A1
• Filed: 05/26/2006
• Published: 10/04/2007
• Est. Priority Date: 03/29/2006
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Shimada, Kentaro, Tanaka, Katsuya
• Granted Patent: US 7,409,492 B2
• Time in Patent Office: Days
• US Class Current: 711/5
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0664 at device level, e.g. emulation of a storage device or system

Abstract

A storage system using flash memories includes a storage controller and plural flash memory modules as storage media. Each flash memory module includes at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip. The storage controller combines the plural flash memory modules into a first logical group, translates a first address used for accessing the flash memory modules belonging to the first logical group to a second address used for handling the first address in the storage controller, and combines the plural first logical groups into a second logical group.

Claims

1. A storage system using flash memories comprising a storage controller and plural flash memory modules as storage media,

each flash memory module comprising at least one flash memory chip, and a memory controller for leveling erase counts of blocks belonging to the flash memory chip,

the storage controller:

combining the plural flash memory modules into a first logical group,

translating a first address used for accessing the flash memory modules belonging to the first logical group to a second address used for handling the first address in the storage controller, and

combining the plural first logical groups into a second logical group.

2. The storage system using flash memories according to claim 1, wherein

the second logical group includes redundant information to be used for rebuilding recorded data when a failure occurs on any of the flash memory modules.

3. The storage system using flash memories according to claim 1, wherein

the second logical group is a logical group either on RAID level 0, RAID level 1, RAID level 1+0, RAID level 3, RAID level 5 or RAID level 6, and an equal capacity is provided for each of the first logical groups constituting the second logical group.

4. The storage system using flash memories according to claim 1,

wherein

a first value is a quotient yielded by dividing a product of effective write speed per flash memory module during the storage system operation and storage system endurance by flash memory endurance;

a second value is a quotient yielded by dividing a product of sustained write speed per flash memory module and storage system endurance by flash memory endurance; and

the capacity of the first logical group is set to be not less than the first value and not more than the second value.

5. The storage system using flash memories according to claim 2,

wherein

a first value is a quotient yielded by dividing a product of effective write speed per flash memory module during the storage system operation and storage system endurance by flash memory endurance;

a second value is a quotient yielded by dividing a product of sustained write speed per flash memory module and storage system endurance by flash memory endurance; and

the capacity of the first logical group is set to be not less than the first value and not more than the second value.

7. The storage system using flash memories according to claim 2

wherein

the second logical group is a logical group either on RAID level 2 or RAID level 4;

and

in the first logical groups constituting the second group, if the number of the first logical groups for storing redundant information is m, and the number of the first logical groups for storing data is “

n”

,

capacity of the first logical group for storing redundant information is set to be at least one time and not more than “

n/m”

times as much as that of the first logical group for storing data.

8. The storage system using flash memories according to claim 1, wherein memory area accessed via the first address is set to be larger than memory area accessed via the second address.

9. The storage system using flash memories according to claim 2, wherein memory area accessed via the first address is set to be larger than memory area accessed via the second address.

10. The storage system using flash memories according to claim 1, wherein the storage controller stores mapping information between the first address and the second address of each flash memory module, and an average erase count of blocks in each flash memory module.

11. The storage system using flash memories according to claim 2, wherein the storage controller stores mapping information between the first address and the second address of each flash memory module, and an average erase count of blocks in each flash memory module.

12. The storage system using flash memories according to claim 1, wherein the storage controller constitutes a plurality of the second logical groups.

13. The storage system using flash memories according to claim 2, wherein the storage controller constitutes a plurality of the second logical groups.

14. The storage system using flash memories according to claim 1, wherein the storage controller constitutes a plurality of second logical groups on different RAID levels.

15. The storage system using flash memories according to claim 2, wherein the storage controller constitutes a plurality of second logical groups on different RAID levels.

16. The storage system using flash memories according to claim 1, wherein the storage controller determines whether or not the storage media is flash memories when the storage system is activated or the storage media is connected with the storage system.

17. The storage system using flash memories according to claim 2, wherein the storage controller determines whether or not the storage media is flash memories when the storage system is activated or the storage media is connected with the storage system.

6. The storage system using flash memories according to claim

wherein

the second logical group is a logical group either on RAID level 2 or RAID level 4;

and

in the first logical groups constituting the second group, if the number of the first logical groups for storing redundant information is m, and the number of the first logical groups for storing data is “

n”

,

capacity of the first logical group for storing redundant information is set to be at least one time and not more than “

n/m”

times as much as that of the first logical group for storing data.

18. A wear-leveling method for a storage system using flash memories comprising:

flash memory modules including at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip; and

a storage controller for

combining the flash memory modules into a first logical group,

translating a first address used for accessing the flash memory modules belonging to the first logical group to a second address used for handling the first address in the storage controller, and

combining a plurality of first logical groups into a second logical group,

the method comprising;

a step of allowing the storage controller to provide count management on write size of each predetermined memory area in the flash memory module;

a step of allowing the storage controller to calculate an average erase count yielded by dividing total write size of each flash memory module through a predetermined time period by a capacity of the flash memory module; and

a first determination step of allowing the storage controller to determine whether or not a difference between a maximum value and a minimum value of the average erase count is not less than a predetermined value,

wherein

at the first step, if the difference of the average erase count is not less than the predetermined value, the method further comprises a step of allowing the storage controller to exchange data between memory area having a maximum write size and memory area having a minimum write size, among the flash memory modules having the maximum difference of the average erase count, and to change mapping information between the first address and the second address.

19. The wear-leveling method for a storage system using flash memories according to claim 18 further comprising:

a second determination step of allowing the storage controller to determine whether or not there are plural flash memory modules of which data has not been exchanged after performing the data exchange step,

wherein

at the second determination step, if it is determined that there are plural flash memory modules of which data has not been exchanged, the method further comprises a step of allowing the storage controller to return to the first determination step.

20. The wear-leveling method for a storage system using flash memories according to claim 18, wherein

if total write size of each first logical group reaches a predetermined value, the storage controller performs the first determination step.

21. The wear-leveling method for a storage system using flash memories according to claim 19, wherein

if total write size of each first logical group reaches a predetermined value, the storage controller performs the first determination step.

22. The wear-leveling method for a storage system using flash memories according to claim 18, wherein

memory area of the first address is set to be larger than that of the second address, and

the data exchange step includes a step of exchanging data by overwriting data in the memory area of the first address.

23. The wear-leveling method for a storage system using flash memories according to claim 19, wherein

memory area of the first address is set to be larger than that of the second address, and

the data exchange step includes a step of exchanging data by overwriting data in the memory area of the first address.

24. The wear-leveling method for a storage system using flash memories according to claim 20, wherein

memory area of the first address is set to be larger than that of the second address, and

the data exchange step includes a step of exchanging data by overwriting data in the memory area of the first address.

25. The wear-leveling method for a storage system using flash memories according to claim 18, wherein there is provided, for the flash memory module, free area in the same size as transferring data at which the memory controller can transfer at a time for each predetermined memory area in the flash memory module, for which count management on the write size is provided,

26. The wear-leveling method for a storage system using flash memories according to claim 18, wherein there is provided, for the flash memory module, free area in the same size as the predetermined memory area in the flash memory module, for which count management on the write size is provided.

27. The wear-leveling method for a storage system using flash memories according to claim 18, wherein

if the flash memory module is replaced with a new flash memory module,

the write size of each predetermined memory area in the previous flash memory module, for which count management is provided, is set as write size of each predetermined memory area in the new replaced flash memory module.

28. A wear-leveling method for a storage system using flash memories comprising:

flash memory modules including at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip; and

a storage controller for

combining the flash memory modules into a first logical group,

translating a first address used for accessing the flash memory modules belonging to the first logical group to a second address used for handling the first address in the storage controller, and

combining a plurality of the first logical groups into a second logical group,

the method comprising;

a step of allowing the storage controller to provide count management on write size of each predetermined memory area in the flash memory module;

a step of allowing the storage controller to calculate an average erase count for each flash memory module, by adding a first average erase count at a predetermined time to a second average erase count yielded by dividing total write size since the predetermined time by capacity of the flash memory module;

a first determination step of allowing the storage controller to determine whether or not a difference between a maximum value and a minimum value of the average erase count is not less than the predetermined value,

wherein

at the first step, if it is determined that the difference is not less than the predetermined value, the method further comprises a step of allowing the storage controller to exchange data between memory area having maximum write size and memory area having minimum write size, among the flash memory modules having the maximum difference of the erase count, and to change mapping information between the first address and the second address.

29. The wear-leveling method for a storage system using flash memories according to claim 28 further comprising a step of allowing the storage controller to replace the first average erase count with the second average erase count.

30. A wear-leveling program for a storage system using flash memories comprising:

flash memory modules including at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip; and

a storage controller for;

combining the plural flash memory modules into a first logical group,

translating a first address used for accessing the flash memory modules belonging into the first logical group to a second address used for handling the first address in the storage controller, and

combining the plural first logical groups into a second logical group,

the program performing;

a process for allowing a computer to provide count management on write size of each predetermined memory area in the flash memory module;

a process for allowing the computer to calculate an average erase count yielded by dividing total write size of each flash memory module through a predetermined time period by capacity of the flash memory module;

a process of a first determination for the computer to determines whether or not a difference between a maximum value and a minimum value of the average erase count is not less than a predetermined value,

wherein

at the first determination, if the difference is not less than a predetermined value, the program further comprises a process for allowing the computer to change mapping information between the first address and the second address.

31. The wear-leveling program for a storage system using flash memories according to claim 30 further comprising:

a process of a second determination for allowing the computer to determine whether or not there are plural flash memory modules of which data is not exchanged after the data exchange step,

wherein

at the second determination process, if it is determined that there are plural flash memory modules of which data has not been exchanged, the program further comprises a process for allowing the computer to return to the first determination process.