On-chip comparison and response collection tools and techniques
First Claim
1. A method of testing a plurality of circuits in a testing system, comprising:
- at a first input of one of the plurality of circuits, receiving masking data for controlling a masking circuit; and
at a second input of the one of the plurality of circuits, receiving expected test response data for evaluating test responses generated during testing of the one of the plurality of circuits, the masking data and the expected test response data being received simultaneously at the first and second inputs.
2 Assignments
0 Petitions
Accused Products
Abstract
Disclosed herein are exemplary embodiments of a so-called “X-press” test response compactor. Certain embodiments of the disclosed compactor comprise an overdrive section and scan chain selection logic. Certain embodiments of the disclosed technology offer compaction ratios on the order of 1000×. Exemplary embodiments of the disclosed compactor can maintain about the same coverage and about the same diagnostic resolution as that of conventional scan-based test scenarios. Some embodiments of a scan chain selection scheme can significantly reduce or entirely eliminate unknown states occurring in test responses that enter the compactor. Also disclosed herein are embodiments of on-chip comparator circuits and methods for generating control circuitry for masking selection circuits.
-
Citations
20 Claims
-
1. A method of testing a plurality of circuits in a testing system, comprising:
-
at a first input of one of the plurality of circuits, receiving masking data for controlling a masking circuit; and
at a second input of the one of the plurality of circuits, receiving expected test response data for evaluating test responses generated during testing of the one of the plurality of circuits, the masking data and the expected test response data being received simultaneously at the first and second inputs. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. An apparatus, comprising:
-
a plurality of scan chain groups, each scan chain group comprising one or more scan chains and one or more corresponding scan chain group outputs;
a plurality of comparator circuits, each comparator circuit comprising a comparator input and a comparator output;
a multiple-input shift register (MISR) comprising MISR inputs and a MISR output; and
a plurality of compactors, each compactor comprising one or more compactor inputs coupled to the one or more scan chain group outputs of a respective one of the plurality of scan chain groups and further comprising a compactor output coupled directly to a respective one of the MISR inputs and also coupled to the comparator input of a respective comparator. - View Dependent Claims (12, 13)
-
-
14. An apparatus for testing a plurality of electronic circuits, the apparatus comprising:
-
a plurality of scan chain groups, each scan chain group comprising one or more scan chains and one or more corresponding scan chain group outputs;
a plurality of comparator circuits, each comparator circuit comprising a comparator input and a comparator output;
an encoder circuit comprising a plurality of encoder inputs and an encoder output, wherein the encoder inputs are coupled to respective comparator outputs; and
a plurality of compactors, each compactor comprising one or more compactor inputs coupled to the scan chain group outputs of a respective one of the scan chain groups and further comprising a compactor output coupled to the comparator input of a respective comparator, the encoder circuit being configured to detect more than two error values output from the compactor outputs. - View Dependent Claims (15, 16, 17, 18)
-
-
19. A system for testing a plurality of circuits in a testing system, comprising:
-
means for receiving masking data for controlling a masking circuit at one of the plurality of circuits; and
means for receiving expected test response data at the one of the plurality of circuits, the masking data and the expected test response data being received simultaneously. - View Dependent Claims (20)
-
Specification