Method and Apparatus for Performing State-Table Driven Regression Testing

• US 20070234300A1
• Filed: 10/20/2006
• Published: 10/04/2007
• Est. Priority Date: 09/18/2003
• Status: Abandoned Application

• Current Assignee: Sensys Medical, Inc. (Sensys Medical Limited)
• Original Assignee: Sensys Medical, Inc. (Sensys Medical Limited)
• Inventors: Crosley, Thomas, Leake, David, Henderson, John
• Application Number:
  US11/551,672
• Publication Number:
  US 20070234300A1
• Time in Patent Office: Days
• US Class Current: 717/124
• CPC Class Codes: G06F 11/3688 for test execution, e.g. scheduling of test suites
• CPC Class Codes: G06F 8/51 Source to source
• CPC Class Codes: G06F 8/76 Adapting program code to run in a different environment; Porting

Abstract

The invention relates to a method and apparatus for performing state-table driven regression testing. More particularly, the invention relates to an application wherein a release build is used without the use of a debug build, which ensures release of the same code that was tested with the exception of the device driver. In a third embodiment, the tested code is the same as the release code, thereby enhancing quality control, quality assurance, verification, and/or validation procedures are maintained. In one embodiment of the invention, at least one state table is used in testing release code. In another embodiment, the test code is developed using a first platform and the release code is used on a second, distinct platform. In yet another embodiment, the invention relates to regression testing using simulated faults as monitored through log files.

Claims

1. A computer implemented method for testing cross-platform functionality of source code, comprising:

wherein use of said source code for generation of both said gold log file and said test log file substantially confirms functionality of said source code on said target system.

2. The method of claim 1, further comprising the steps of:

providing state table driven embedded source code operational on a host system;

loading a state table from a computer readable storage medium;

generating a gold log file by applying said state table to said source code, wherein said state table directs functions to test within said source code, wherein said state table covers a multitude of subroutines and paths of said source code;

performing automated regression testing on a target system using said source code and said state table to yield a test log file, wherein said source code tested on said host system and on said target system comprises no enabled debug flags;

comparing said test log file to said gold log file, wherein said host system differs from said target system.

3. The method of claim 2, further comprising the step of editing said source code, wherein said step of editing occurs after generation of said gold file and prior to said step of regression testing.

4. The method of claim 3, wherein said step of editing comprises:

editing a first subroutine, wherein said step of comparing comprises;

testing a multitude of subroutines.

5. The method of claim 2, further comprising the step of:

simulating a hardware fault during operation of said code, wherein said step of simulating occurs in both the case of generating said gold log file and in the case of performing automated regression testing to yield said test log file.

6. The method of claim 2, further comprising the step of:

testing coverage of said source code using a hardware simulator to test a plurality of hardware states, wherein said host system comprises a software driver interfaced directly with said hardware simulator.

7. The method of claim 2, wherein said source code comprises identical code on said host system and said target system.

8. The method of claim 2, wherein said source code is tested in release mode on said target system.

9. The method of claim 2, wherein said target system comprises any of:

a glucose concentration analyzer;

a biomedical device;

Food and Drug Administration (FDA) regulated software; and

Federal Aviation Administration (FAA) regulated software.

10. The method of claim 2, wherein said state table comprises:

a set of parameters for testing a set of conditions.

11. The method of claim 2, wherein said source code comprises software application code.

12. The method of claim 2, wherein said source code builds a software application code.

13. The method of claim 2, wherein a build of said source code generates cross-platform code operational on said target system, wherein said cross-platform code is not operable on said host system.

14. The method of claim 13, wherein said build comprises a cross-platform build.

15. The method of claim 2, further comprising the step of:

altering said source code after generation of said gold log file.

16. The method of claim 15, wherein said step of altering comprises any of:

debugging said software application code; and

adding functionality to said software application code.

17. The method of claim 2, further comprising the steps of:

after running cross-platform;

debugging;

finding an error;

debugging; and

running cross-platform again;

releasing the resulting edited software application code as a release build.

18. The method of claim 2, further comprising the step of using said gold log file and said test log file for any of:

quality control;

quality assurance;

a verification procedure; and

a validation procedure.

19. A computer implemented method for testing cross-platform functionality of source code, comprising:

providing state table driven source code operational on a host system;

loading a state table from a computer readable storage medium, wherein said state table directs functions to test within said source code, wherein said state table covers a multitude of subroutines and paths of said source code;

simulating hardware conditions via a hardware simulator to said host system, wherein said host system comprises a software driver interfaced directly with said hardware simulator;

generating a gold log file through testing of a combination of said state table and said hardware conditions to said source code;

performing automated regression testing on a target system using said source code and said hardware simulator and said state table to yield a test log file;

comparing said test log file to said gold log file, wherein said step of comparing substantially confirms functionality of said source code on said target system.

20. The method of claim 19, wherein said release mode comprises software with no debugging mode.

21. The method of claim 19, wherein said host system comprises a first computer platform using a first family of central processing units.

22. The method of claim 19, wherein said source code comprises both release code and debug code.

23. The method of claim 19, further comprising the step of:

if said test log file is substantially similar to said gold log file, implementing said edited software code on a target system.

24. The method of claim 19, wherein said hardware condition comprises at least three of:

lamp state;

.

configuration of hardware;

data collection parameters;

motor movement;

temperature; and

spectral data collection.

25. The method of claim 19, wherein said source code is embedded.

26. The method of claim 19, wherein said state table comprises a series of tables.

27. The method of claim 19, wherein said state table comprises a plurality of test parameters.

28. The method of claim 19, wherein a release build does not necessitate a debug build.

29. An apparatus having hardware and software for testing embedded source code, comprising:

a target system having a first central processing unit, wherein said target system contains object code derived from said source code, wherein said source code is generated using a host system having a second central processing unit, wherein said first central processing unit and said second central processing unit are from separate families of central processors, wherein said target system comprises;

a stand alone device;

a state table;

a hardware configuration parameter; and

a gold log file generated on said host system, wherein said embedded source code generated on said host system operates within said target system,

wherein said gold log was generated by applying said state table to said source code on said host system, wherein said state table directs functions to test within said source code, wherein said state table covers a multitude of subroutines and paths of said source code;

wherein said target system uses automated regression testing, said state table, and said hardware configuration parameter to generate a test log file, wherein both said source code and said object code contain no enabled debug flags; and

wherein a comparison of said log file with said gold file validates said source and object code.

30. The apparatus of claim 29, wherein said first central processing unit comprises a floating point processor.

31. The apparatus of claim 30, wherein said second central processing unit comprises any of:

an x-scale processor;

an Intel PXA255 processor;

an Intel 8051 processor; and

an advanced RISC machine.

32. The apparatus of claim 30, wherein said target platform comprises a device having computer memory and input/output connectors.

33. A method for testing cross-platform functionality of source code, comprising:

providing state table driven embedded source code generated on a host system;

loading a state table from a computer readable storage medium;

generating a gold log file by applying said state table to said source code, wherein said state table directs functions to test within said source code, wherein said state table covers a multitude of subroutines and paths of said source code;

performing automated regression testing on a target system using said source code and said state table to yield a test log file, wherein said host system uses a first computer processor from a first family and said target system uses a second computer processor from a second family;

comparing said test log file to said gold log file.

34. The apparatus of claim 33, wherein said first computer processor comprises an x86 processor and said second computer processor comprises a processor that is not an x86 processor.