CONTENTION-FREE KEEPER CIRCUIT AND A METHOD FOR CONTENTION ELIMINATION
First Claim
1. A contention-free keeper circuit, comprising:
- a keeper circuit, wherein the keeper circuit includes a first node and a second node;
a delay element for providing a time delay, the delay element having an input and an output, wherein the delay element input is coupled to one selected from the group consisting of the first node and the second node;
a high-to-low contention elimination element coupled between the first node and a first supply, and coupled to the delay element output; and
a low-to-high contention elimination element coupled between the first node and a second supply, and coupled to the delay element output, (i) wherein responsive to a low-to-high transition at the first node and the time delay, the low-to-high contention elimination element eliminates a low-to-high contention within the keeper circuit, and (ii) wherein responsive to a high-to-low signal transition at the first node and the time delay, the high-to-low contention elimination element eliminates a high-to-low contention within the keeper circuit, further wherein the first supply is greater than the second supply.
23 Assignments
0 Petitions
Accused Products
Abstract
A contention-free keeper circuit including a keeper circuit having a first node and a second node, is provided. The contention-free keeper circuit may further include a delay element for providing time delay. The contention-free keeper circuit may further include a high-to-low contention element coupled between the first node and a first supply, and coupled to the delay element output. The contention-free keeper circuit may further include a low-to-high contention elimination element coupled between the first node and a second supply, and coupled to the delay element output, (i) wherein responsive to a low-to-high transition at the first node and the time delay, the low-to-high contention elimination element eliminates a low-to-high contention within the keeper circuit, and (ii) wherein responsive to a high-to-low signal transition at the first node and the time delay, the high-to-low contention elimination element eliminates a high-to-low contention within the keeper circuit.
16 Citations
20 Claims
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1. A contention-free keeper circuit, comprising:
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a keeper circuit, wherein the keeper circuit includes a first node and a second node;
a delay element for providing a time delay, the delay element having an input and an output, wherein the delay element input is coupled to one selected from the group consisting of the first node and the second node;
a high-to-low contention elimination element coupled between the first node and a first supply, and coupled to the delay element output; and
a low-to-high contention elimination element coupled between the first node and a second supply, and coupled to the delay element output, (i) wherein responsive to a low-to-high transition at the first node and the time delay, the low-to-high contention elimination element eliminates a low-to-high contention within the keeper circuit, and (ii) wherein responsive to a high-to-low signal transition at the first node and the time delay, the high-to-low contention elimination element eliminates a high-to-low contention within the keeper circuit, further wherein the first supply is greater than the second supply. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A contention-free keeper circuit, comprising:
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a keeper circuit, wherein the keeper circuit includes a first node and a second node;
a delay element for providing a time delay, the delay element having an input and an output, wherein the delay element input is coupled to one selected from the group consisting of the first node and the second node; and
a contention elimination element coupled between a supply and the first node, and coupled to the delay element output, wherein responsive to a transition at the first node from a first level to another level and the time delay, the contention elimination element eliminates a contention within the keeper circuit. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification