Simplified pitch doubling process flow
First Claim
1. A method for fabricating a semiconductor device, the method comprising:
- patterning a layer of photoresist material to form a plurality of mandrels in a device array region;
depositing an oxide material over the plurality of mandrels and over a device peripheral region;
forming a pattern of photoresist material over the oxide material in the device peripheral region;
anisotropically etching the oxide material from exposed horizontal surfaces in the device array region; and
selectively etching photoresist material from the device array region and from the device peripheral region.
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Accused Products
Abstract
A method for fabricating a semiconductor device comprises patterning a layer of photoresist material to form a plurality of mandrels in a device array region. The method further comprises depositing an oxide material over the plurality of mandrels and over a device peripheral region. The method further comprises forming a pattern of photoresist material over the oxide material in the device peripheral region. The method further comprises anisotropically etching the oxide material from exposed horizontal surfaces in the device array region. The method further comprises selectively etching photoresist material from the device array region and from the device peripheral region.
167 Citations
66 Claims
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1. A method for fabricating a semiconductor device, the method comprising:
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patterning a layer of photoresist material to form a plurality of mandrels in a device array region;
depositing an oxide material over the plurality of mandrels and over a device peripheral region;
forming a pattern of photoresist material over the oxide material in the device peripheral region;
anisotropically etching the oxide material from exposed horizontal surfaces in the device array region; and
selectively etching photoresist material from the device array region and from the device peripheral region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A method of forming a memory device, the method comprising:
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forming a plurality of mandrels over a substrate in an array region of the memory device, the mandrels separated by exposed portions the substrate;
depositing a spacer material over the mandrels, over the exposed portions of the substrate, and over a peripheral region of the memory device;
depositing a peripheral mask over the spacer material in the peripheral region of the memory device; and
anisotropically etching the spacer material from exposed horizontal surfaces, thereby leaving spacer material remaining (a) on vertical sidewalls of the mandrels in the array region, and (b) between the substrate and the peripheral mask in the peripheral region. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
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35. A method of forming an integrated circuit, the method comprising:
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forming a plurality of mandrels on a hard mask layer in an array region, wherein the mandrels comprise a photoresist material;
depositing an oxide material over the array region and over a peripheral region that surrounds the array region, wherein the oxide material covers the plurality of mandrels;
forming a pattern of photoresist material over the oxide material in the peripheral region;
anisotropically etching the oxide material from horizontal surfaces in the array region; and
removing exposed photoresist material from the array region and the peripheral region after anisotropically etching the oxide material. - View Dependent Claims (36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49)
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50. A method of integrated circuit fabrication, the method comprising:
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using a lithographic technique to define a plurality of elongate mandrels over a hard mask layer in an integrated circuit array region, wherein the mandrels comprise a photoresist material; and
forming a pattern of spacers around the plurality of elongate mandrels, wherein the pattern of spacers have a pitch that is smaller than a minimum resolvable pitch of the lithographic technique, and wherein the spacers are formed from an oxide material that is deposited at a temperature less than about 100°
C. - View Dependent Claims (51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65)
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66-81. -81. (canceled)
Specification