Fast Filtering Means and Filtering and Decimation Methos

• US 20070241806A1
• Filed: 03/02/2004
• Published: 10/18/2007
• Est. Priority Date: 03/02/2004
• Status: Active Grant

• Current Assignee: Music Group IP Limited (Music Group Services US Incorporated)
• Original Assignee: The TC Group A/S (Music Group Services US Incorporated)
• Inventors: Pedersen, Kim, Arknaes-Pedersen, Lars
• Granted Patent: US 8,028,013 B2
• Time in Patent Office: Days
• US Class Current: 327/335
• CPC Class Codes: H03H 17/0223 Computation saving measures; Accelerating measures computations per se G06F
• CPC Class Codes: H03H 17/0226 comprising look-up tables
• CPC Class Codes: H03H 17/0664 where the output-delivery frequency is lower than the input sampling frequency, i.e. decimation

Abstract

The invention relates to a hardware implemented filtering method including establishing a representation DIS of the derivative of at least a part of a time-quantized input signal IS, and establishing at least one sample of a time- and amplitude-quantized output signal OS by performing filtering on the basis of at least a part of a filter representation IFC1, IFC2, IFC3 and the representation DIS of the derivative of at least a part of the input signal IS. The invention further relates to a hardware implemented decimation method for decimating a time-quantized input signal IS including dividing the time-quantized input signal IS into intervals, for each of the intervals establishing a sample of a time- and amplitude-quantized output signal OS according to the above mentioned filtering method. The invention further relates to a fast filtering means FFM implementing the above-mentioned methods.

Claims

1. Hardware implemented filtering method comprising;

establishing a representation (DIS) of a derivative of at least a part of a time-quantized input signal (IS), and

establishing at least one sample of a time- and amplitude-quantized output signal (OS) by performing filtering on the basis of at least a part of a filter representation (IFC1, IFC2, IFC3) and said representation (DIS) of the derivative of at least a part of said input signal (IS).

3. Hardware implemented filtering method according to claim 1, whereby said establishing at least one sample of a time- and amplitude-quantized output signal (OS) is implemented according to the method of claim 2.

5. Hardware implemented filtering method according to claim 1, whereby said time-quantized input signal (IS) comprises in average at least 10samples for each input signal value change.

6. Hardware implemented filtering method according to claim 1, whereby said time-quantized input signal (IS) is a pulse width modulated signal.

7. Hardware implemented filtering method according to claim 1, whereby said establishing a representation (DIS) of the derivative of at least a part of said time-quantized input signal (IS) comprises establishing a sequence of differences between successive samples of said at least a part of said input signal (IS).

8. Hardware implemented filtering method according to claim 1, whereby said at least a part of said time-quantized input signal (IS) in respect of its length corresponds to the length of said at least a part of an impulse response.

9. Hardware implemented filtering method according to claim 1, whereby said representation (DIS) of the derivative of at least a part of said time-quantized input signal (IS) is stored in a differentiated input signal representing array (DA).

10. Hardware implemented filtering method according to claim 1, whereby said establishing a representation (DIS) of the derivative of at least a part of a time-quantized input signal (IS) comprises indexing corresponding times and directions of amplitude changes of said at least a part of said input signal (IS).

11. Hardware implemented filtering method according to claim 1, whereby the length of said at least a part of said filter representation (IFC1, IFC2, IFC3) is an integer multiple of the length of a symbol of said at least a part of said time-quantized input signal (IS).

12. Hardware implemented filtering method according to claim 1, whereby a number of changes within a symbol of said at least a part of said time-quantized input signal is constant.

13. Hardware implemented filtering method according to claim 1, whereby said times are indexed relative to each other.

14. Hardware implemented filtering method according to claim 1, whereby said establishing a representation (DIS) of the derivative of at least a part of a time-quantized input signal (IS) comprises storing into a snapshot register (SR) said at least a part of said time-quantized input signal (IS).

15. Hardware implemented filtering method according to claim 14, whereby said establishing a representation (DIS) of the derivative of at least a part of a time-quantized input signal (IS) comprises querying said snapshot register (RS) regarding input signal changes.

16. Hardware implemented filtering method according to claim 1, whereby said at least a part of said filter representation (IFC1, IFC2, IFC3) is a sum representation of at least a part of an impulse response.

17. Hardware implemented filtering method according to claim 1, whereby said at least a part of said filter representation (IFC1, IFC2, IFC3) is predetermined.

18. Hardware implemented filtering method according to claim 1, whereby said at least a part of said filter representation (IFC1, IFC2, IFC3) is implemented by means of at least one filter coefficient, more preferably at least 128 filter coefficients and even more preferably at least 384 filter coefficients.

19. Hardware implemented filtering method according to claim 1, whereby said at least a part of said filter representation (IFC1, IFC2, IFC3) is implemented by means of at least one model, preferably represented by at least one polynomial.

20. Hardware implemented filtering method according to claim 1, whereby said implementation of said at least a part of said filter representation (IFC1, IFC2, IFC3) is adapted to utilize any symmetry of said filter representation.

21. Hardware implemented filtering method according to claim 1, whereby said at least a part of said filter representation (IFC1, IFC2, IFC3) is user-adjustable.

22. Hardware implemented filtering method according to claim 1, whereby said performing filtering comprises convolving said at least a part of said filter representation (IFC1, IFC2, IFC3) with said representation (DIS) of the derivative of at least a part of said time-quantized input signal (IS).

23. Hardware implemented filtering method according to claim 1, whereby said performing filtering further comprises for each of said at least one sample of a time- and amplitude-quantized output signal (OS) adding the result of multiplying an initial value (IV) of said at least a part of said time-quantized input signal (IS) with a value of said at least a part of said filter representation (IFC1, IFC2, IFC3).

24. Hardware implemented filtering method according to claim 1, whereby said performing filtering further comprises adding, for each of said at least one sample of a time- and amplitude-quantized output signal (OS), an initial value (IV) of said at least a part of said time-quantized input signal (IS).

25. Hardware implemented filtering method according to claim 1, whereby said performing filtering comprises exercising the expression

$y$

[ n ] = ∑

k = 0 N - 2 ⁢

 

⁢

( l ⁡

[ k ] ·

x ′

⁡

[ n - k ] ) + l ⁡

[ N - 1 ] ·

x ⁡

[ n - ( N - 1 ) ] ,

where y[n] represents said at least one sample of a time- and amplitude-quantized output signal (OS), x[n] represents said at least a part of said time-quantized input signal (IS), x′

[n] represents said representation (DIS) of the derivative of x[n], l[k] represents said at least a part of said filter representation (IFC1, IFC2, IFC3), and N represents the length of l[k].

26. Hardware implemented filtering method according to claim 1, whereby said performing filtering further comprises performing conventional filtering.

27. Hardware implemented filtering method according to claim 1, whereby a sample rate of said time- and amplitude-quantized output signal (OS) is different from a sample rate of said time-quantized input signal (IS).

28. Hardware implemented filtering method according to claim 1, whereby a sample rate of said time- and amplitude-quantized output signal (OS) corresponds to a symbol rate of said time-quantized input signal (IS).

29. Hardware implemented filtering method according to claim 22, whereby said convolving said at least a part of said filter representation (IFC1, IFC2, IFC3) with said representation (DIS) of the derivative of at least a part of said time-quantized input signal (IS) is performed for only some of the samples of said time-quantized input signal (IS).

30. Hardware implemented filtering method according to claim 1, whereby said filter representation (IFC1, IFC2, IFC3) comprises a sum representation of a low-pass filter.

31. Hardware implemented filtering method according to claim 1, whereby said method is exercised in real time.

32. Hardware implemented filtering method according to claim 1, whereby said at least a part of a filter representation (IFC1, IFC2, IFC3) represents at least a part of an impulse response.

33. Hardware implemented filtering method according to claim 1, whereby said at least a part of a filter representation (IFC1, IFC2, IFC3) represents the derivative of at least a part of an impulse response.

34. Hardware implemented filtering method according to claims 1 further comprising the step of

integrating at least once said time- and amplitude-quantized output signal (OS).

35. Hardware implemented decimation method for decimating a time-quantized input signal (IS) comprising;

dividing said time-quantized input signal (IS) into intervals,

for each of said intervals establishing a sample of a time- and amplitude-quantized output signal (OS) according to claim 1.

37. Fast filtering means (FFM) according to claim 36 implementing the hardware implemented filtering method according to any of the claims 1 to 34 or the hardware implemented decimation method according to claim 35.

2. Hardware implemented method of convolving in the time domain an input signal (x[n]) with an impulse response (h[k]) in order to establish an output signal (y[n]), comprising;

providing said output signal (y[n]) at least partly by a convolution in the time domain of a difference signal representation (x′

[n]) of said input signal (x[n]) and a sum representation (l[k]) of said impulse response (h[k]).

4. Hardware implemented filtering method according to claim 2, whereby said impulse response is finite.

36. Fast filtering means (FFM) comprising

differentiation means (DM) for establishing a representation (DIS) of the derivative of at least a part of a time-quantized input signal (IS), and

filtering means (FM) for establishing at least one sample of an output signal (OS) by performing filtering on the basis of at least a part of a filter representation (IFC1, IFC2, IFC3) and said representation (DIS) of the derivative of at least a part of said input signal (IS).