STRUCTURE AND ACCESS METHOD FOR MAGNETIC MEMORY CELL AND CIRCUIT OF MAGNETIC MEMORY
First Claim
1. A magnetic memory cell structure, comprising:
- a stacked magnetic pinned layer, comprising a top pinned layer and a bottom pinned layer, there being a sufficient large magnetic coupling force between the top pinned layer and the bottom pinned layer for maintaining a magnetization vector of the top pinned layer in a reference direction;
a tunnel barrier layer, disposed on the stacked magnetic pinned layer; and
a magnetic free stacked layer, disposed on the tunnel barrier layer, wherein the magnetic free stacked layer comprises a bottom free layer having a bottom magnetization vector and a top free layer having a top magnetization vector,wherein if no assisted magnetic field is supplied, the bottom magnetization vector is anti-parallel to the top magnetization vector and is perpendicular to the reference direction of the top pinned layer.
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Abstract
A magnetic memory cell, used in a magnetic memory device, includes a stacked magnetic pinned layer, serving as a part of the base structure. The stacked magnetic pinned stacked layer has a top pinned layer and a bottom pinned layer, between which there is a sufficient large magnetic coupling force to maintain magnetization of the top pinned layer on a reference direction. A tunnel barrier layer is disposed on the stacked magnetic pinned layer. A magnetic free stacked layer is disposed on the tunnel barrier layer. The magnetic free stacked layer includes a bottom free layer having a bottom magnetization and a top free layer having a top magnetization. When no assisted magnetic field is applied, the bottom magnetization is anti-parallel to the top magnetization and is perpendicular to the reference direction on the top pinned layer. A magnetic bias layer can be also disposed on the top free layer.
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Citations
29 Claims
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1. A magnetic memory cell structure, comprising:
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a stacked magnetic pinned layer, comprising a top pinned layer and a bottom pinned layer, there being a sufficient large magnetic coupling force between the top pinned layer and the bottom pinned layer for maintaining a magnetization vector of the top pinned layer in a reference direction; a tunnel barrier layer, disposed on the stacked magnetic pinned layer; and a magnetic free stacked layer, disposed on the tunnel barrier layer, wherein the magnetic free stacked layer comprises a bottom free layer having a bottom magnetization vector and a top free layer having a top magnetization vector, wherein if no assisted magnetic field is supplied, the bottom magnetization vector is anti-parallel to the top magnetization vector and is perpendicular to the reference direction of the top pinned layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A magnetic memory circuit, comprising:
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a plurality of memory cell structures, forming a memory cell array having a plurality of memory columns and a plurality of memory rows; a plurality of bit current lines, disposed respectively corresponding to the memory columns; a plurality of word current lines, disposed respectively corresponding to the memory rows; a plurality of read bit lines, each of the read bit lines reading a magnetoresistance of each of the memory cell structures; a driving circuit unit, controlling the word current lines, the bit current lines, and the read bit lines to directly read the magnetoresistance of the selected memory cell structure, to supply a plurality of assisted magnetic fields required for data access to a reference memory cell structure different from the selected memory cell structure, and to read a reference magnetoresistance; and a comparison circuit unit, receiving the magnetoresistance and comparing the received magnetoresistance with the reference magnetoresistance to determine a binary data stored in the selected memory cell structure. - View Dependent Claims (28, 29)
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Specification