NON-VOLATILE MEMORY SHARING APPARATUS FOR MULTIPLE PROCESSORS AND METHOD THEREOF
First Claim
1. A non-volatile memory sharing system comprising:
- a plurality of processors comprising at least a first processor and a second processor;
a non-volatile memory coupled to the first processor, the non-volatile memory for storing a plurality of program codes or data comprising at least a first program code for the first processor and a second program code or data for the second processor; and
a processor bridge coupled between the first processor and the second processor;
wherein the first processor is for executing the first program code directly from the program code storage module, the second processor is for sending an access request requesting data corresponding to the second program code to the processor bridge;
the first processor is for retrieving the access request from the processor bridge, fetching the data from the second program code in the non-volatile memory according to the access request, and delivering the data to the processor bridge; and
the second processor is further for fetching the data from the processor bridge.
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Accused Products
Abstract
A multiple processor system includes a plurality of processors including a first processor and a second processor; a program code storage module coupled to the first processor, the program code storage module for storing program code including first program code for the first processor and second program code for the second processor; and a processor bridge coupled between the first processor and the second processor; wherein the first processor executes the first program code, the second processor is for sending an access request requesting data corresponding to the second program code to the processor bridge; the first processor is for retrieving the access request from the processor bridge, fetching the data from the second program code in the program code storage module according to the access request, and delivering the data to the processor bridge; and the second processor is further for fetching the data from the processor bridge.
25 Citations
20 Claims
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1. A non-volatile memory sharing system comprising:
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a plurality of processors comprising at least a first processor and a second processor;
a non-volatile memory coupled to the first processor, the non-volatile memory for storing a plurality of program codes or data comprising at least a first program code for the first processor and a second program code or data for the second processor; and
a processor bridge coupled between the first processor and the second processor;
wherein the first processor is for executing the first program code directly from the program code storage module, the second processor is for sending an access request requesting data corresponding to the second program code to the processor bridge;
the first processor is for retrieving the access request from the processor bridge, fetching the data from the second program code in the non-volatile memory according to the access request, and delivering the data to the processor bridge; and
the second processor is further for fetching the data from the processor bridge. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A memory sharing method for a multiple processor system comprising a plurality of processors with at least a first processor and a second processor, a non-volatile memory coupled to the first processor, and a processor bridge coupled between the first processor and the second processor, the non-volatile memory for storing a plurality of program codes comprising at least a first program code for the first processor and a second program code for the second processor, the memory sharing method comprising:
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sending an access request from the second processor requesting data corresponding to the second program code to the processor bridge;
retrieving the access request from the processor bridge with the first processor;
fetching the data corresponding to the second program code from the non-volatile memory according to the access request with the first processor;
delivering the data corresponding to the second program code to the processor bridge; and
fetching the data from the processor bridge with the second processor. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification