Cache metadata for implementing bounded transactional memory

• US 20070245099A1
• Filed: 06/08/2007
• Published: 10/18/2007
• Est. Priority Date: 12/07/2005
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Harris, Timothy, Smith, Burton, Gray, Jan, Larus, James
• Granted Patent: US 8,813,052 B2
• Time in Patent Office: Days
• US Class Current: 711/156
• CPC Class Codes: G06F 12/0808 with cache invalidating means G06F12/0815 takes precedence
• CPC Class Codes: G06F 12/0842 for multiprocessing or multitasking
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/466 Metadata, control data
• CPC Class Codes: G06F 2212/507 using speculative control
• CPC Class Codes: G06F 9/3004 to perform operations on memory
• CPC Class Codes: G06F 9/30047 Prefetch instructions; cache control instructions
• CPC Class Codes: G06F 9/30087 Synchronisation or serialisation instructions
• CPC Class Codes: G06F 9/3834 Maintaining memory consistency
• CPC Class Codes: G06F 9/38585 with result invalidation, e.g. nullification
• CPC Class Codes: G06F 9/467 Transactional memory G06F9/528 takes precedence

Abstract

Various technologies and techniques are disclosed for providing a bounded transactional memory application that accesses cache metadata in a cache of a central processing unit. When performing a transactional read from the bounded transactional memory application, a cache line metadata transaction-read bit is set. When performing a transactional write from the bounded transactional memory application, a cache line metadata transaction-write bit is set and a conditional store is performed. At commit time, if any lines marked with the transaction-read bit or the transaction-write bit were evicted or invalidated, all speculatively written lines are discarded. The application can also interrogate a cache line metadata eviction summary to determine whether a transaction is doomed and then take an appropriate action.

Claims

1. A computer-readable medium having computer-executable instructions for causing a computer to perform steps comprising:

access cache metadata in a cache of a central processing unit from a bounded transactional memory application;

when performing a transactional read from the bounded transactional memory application, software sets a cache line metadata transaction-read bit; and

when performing a transactional write from the bounded transactional memory application, software sets a cache line metadata transaction-write bit, configured as a speculative-write bit, and performs a conditional store.

2. The computer-readable medium of claim 1, further having computer-executable instructions for causing a computer to perform steps comprising:

clear all speculative-write bits if no lines marked with the cache line metadata transaction-read bit or the cache line metadata transaction-write bit were evicted or invalidated.

3. The computer-readable medium of claim 2, wherein the speculative-write bits are cleared by a flash clear.

4. The computer-readable medium of claim 3, wherein the flash clear of the speculative-write bits instantly commits the speculatively written data.

5. The computer-readable medium of claim 1, further having computer-executable instructions for causing a computer to perform steps comprising:

using the cache metadata of the cache to determine if a particular transaction is doomed.

6. The computer-readable medium of claim 1, wherein the cache metadata includes metadata for each cache line.

7. The computer-readable medium of claim 1, wherein the cache metadata includes cache metadata control registers.

8. The computer-readable medium of claim 1, wherein the conditional store is performed by a hardware instruction contained in an instruction set architecture on the central processing unit.

9. The computer-readable medium of claim 1, wherein the conditional store is conditional on a continued presence of the cache line metadata transaction-write bit.

10. A method for improving operations of a bounded transactional memory system using cache metadata in a cache of a central processing unit comprising the steps of:

providing a bounded transactional memory application with access to cache metadata in a cache of a central processing unit;

for every transactional read, setting a cache line metadata transaction-read bit;

for every transactional write, setting a cache line metadata transaction-write bit that also designates a speculative write; and

at commit time, if any lines marked with the cache line metadata transaction-read bit or the cache line metadata transaction-write bit were evicted or invalidated, discarding all speculatively written lines.

11. The method of claim 10, wherein in addition to discarding all speculatively written lines, a cache metadata invalidate instruction is called.

12. The method of claim 11, wherein the cache metadata invalidate instruction is part of an instruction set architecture on the central processing unit.

13. The method of claim 10, wherein at commit time, if none of the lines marked with the cache line metadata transaction-read bit or the cache line metadata transaction-write bit were evicted or invalidated, then flash clearing all speculative transaction-write bits.

14. The method of claim 13, wherein by flash clearing the speculative write bits, a respective one or more writes are committed.

15. A computer-readable medium having computer-executable instructions for causing a computer to perform the steps recited in claim 10.

16. A method for handling a doomed transaction, using cache metadata in a cache of a central processing unit comprising the steps of:

providing a bounded transactional memory application with access to cache metadata in a cache of a central processing unit;

configuring an eviction handler to be invoked if a cache metadata transaction-read or transaction-write bit is evicted or invalidated; and

performing an appropriate action since the transaction is doomed.

17. The method of claim 16, wherein the appropriate action includes discarding all speculatively written lines.

18. The method of claim 16, wherein the appropriate action includes executing a cache metadata flash clear instruction.

19. The method of claim 18, wherein the cache metadata invalidate instruction is part of an instruction set architecture on the central processing unit.

20. A computer-readable medium having computer-executable instructions for causing a computer to perform the steps recited in claim 16.