Modulation of an RF Transmit Signal

• US 20070247254A1
• Filed: 01/17/2007
• Published: 10/25/2007
• Est. Priority Date: 04/06/2006
• Status: Abandoned Application

• Current Assignee: Preco Electronics Incorporated (Sensata Technologies Holding Plc)
• Original Assignee: Preco Electronics Incorporated (Sensata Technologies Holding Plc)
• Inventors: Hayden, Douglas Todd
• Application Number:
  US11/624,112
• Publication Number:
  US 20070247254A1
• Time in Patent Office: Days
• US Class Current: 332/117
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation

Abstract

Techniques for reducing interference among transceivers are disclosed. A transistor generates a radio frequency transmit signal in response to a generated pulse. The pulse is generated when transitions are detected in a clock signal. The clock signal is produced by an oscillator block which includes a ceramic resonator configured as a clock source. When interference is detected, the pulse applied to the transistor is varied. The frequency of the transmit signal is optionally modulated by varying the temperature of a resonator element. To vary this temperature, the current flowing through one or more resistive elements positioned in proximity of the resonator element is varied according to a control signal. As the level of this current flow varies, the amount of heat emitted by the resistive elements varies, thereby changing the temperature of the resonator element which has a relatively high temperature sensitivity.

Claims

1. A circuit operative to modulate the oscillation frequency of a transmit signal, the circuit comprising:

an oscillator block adapted to generate a clock signal, the oscillator block including a ceramic resonator configured as a clock source;

a pulse generator block adapted to generate a pulse signal in response to detecting a transition of the clock signal; and

a transistor having a first terminal configured to receive a biasing signal and a second terminal configured to receive said pulse signal,

wherein said transistor generates a radio frequency signal in response to a low-to-high or high-to-low transition of said pulse signal.

2. The circuit of claim 1 wherein said ceramic resonator has a temperature sensitivity characteristic and the frequency of said clock signal varies based on said temperature sensitivity characteristic.

3. The circuit of claim 2 wherein said temperature sensitivity of said ceramic resonator is at least ±

1000 parts per million (0.1%) over an operating temperature range that includes an ambient temperature of said circuit.

4. The circuit of claim 1 wherein said ceramic resonator has a frequency tolerance of at least ±

1000 parts per million (0.1%) in relation to its specified operating frequency.

5. The circuit of claim 1 wherein said ceramic resonator has a stable phase noise characteristic.

6. The circuit of claim 1 wherein said clock signal enables a phase coherent detection of said radio frequency signal by a synchronous receiver.

7. The circuit of claim 1 further comprising a control block adapted to generate a control signal, and wherein said control signal is delivered to said oscillator block.

8. The circuit of claim 7 wherein said oscillator block further comprises one or more resistive elements disposed in proximity to said ceramic resonator, and wherein a current flows through said one or more resistive elements in response to said control signal.

9. The circuit of claim 8 wherein said one or more resistive elements produce heat in response to said current flow and said heat changes an ambient temperature of said ceramic resonator.

10. The circuit of claim 9 wherein said ceramic resonator produces a variation in the frequency of said clock signal in response to said change of said ambient temperature.

11. The circuit of claim 9 wherein said control block varies a duty cycle of said control signal to thereby control said heat produced by said one or more resistive elements.

12. The circuit of claim 11 wherein said control block changes the duty cycle of said control signal in response to an indication that interference is detected at a synchronous receiver.

13. The circuit of claim 11 wherein the duty cycle of said control signal is based upon a value of a register disposed in said control block.

14. The circuit of claim 11 wherein said control block varies the duty cycle of said control signal according to a pseudo-random value.

15. The circuit of claim 7 wherein said control block is a commercially available microcontroller.

16. The circuit of claim 7 wherein said control block is configured to disable delivery of said clock signal to said pulse generator block.

17. The circuit of claim 16 wherein said clock signal is delivered to a synchronous receiver when delivery of said clock signal to said pulse generator block is disabled.

18. A method of varying a frequency of a clock signal, the method comprising:

modulating a control signal;

varying current flow through one or more resistive elements in response to the modulation of the control signal thereby to vary a heat generated by the one or more resistive elements; and

varying a temperature of a ceramic resonator in response to the variation in the generated heat, wherein variation in the temperature of the ceramic resonator produces a variation in the frequency of the clock signal.

19. The method of claim 18 wherein said ceramic resonator has a temperature sensitivity characteristic and the frequency of said clock signal varies based upon said temperature sensitivity characteristic.

20. The method of claim 19 wherein said temperature sensitivity of said ceramic resonator is at least ±

1000 parts per million (0.1%) within its specified operating temperature range.

21. The method of claim 18 wherein said ceramic resonator has a frequency tolerance of at least ±

1000 parts per million (0.1%) in relation to its specified operating frequency.

22. The method of claim 18 wherein said ceramic resonator has a stable phase noise characteristic.

23. The method of 18 wherein the current flow through the one or more resistive elements is varied via a transistor having a first terminal adapted to receive said control signal, a second terminal coupled to a common terminal of the one or more resistive elements, and a third terminal coupled to the ground.