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LATENCY REDUCTION IN A DISPLAY DEVICE

  • US 20070247470A1
  • Filed: 07/10/2006
  • Published: 10/25/2007
  • Est. Priority Date: 04/20/2006
  • Status: Active Grant
First Claim
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1. A display device for reducing latency comprising:

  • an input module operable to receive a digital signal having an associated frame rate, the digital signal comprising a frame including a plurality of pixels;

    a frame buffer operable to store one or more of the pixels;

    a display module operable to receive the pixels and to display the frame; and

    a controller operable to determine the frame rate of the digital signal, to determine a pixel delay from the frame rate, to monitor the frame buffer, and, when the frame buffer contains a number of pixels greater than or equal to the pixel delay but less than all pixels corresponding to the frame, to instruct the frame buffer to initiate transmission of the pixels to the display module.

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