SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATES AND SEMICONDUCTOR DEVICES USING VOID SPACES

• US 20070257312A1
• Filed: 07/06/2007
• Published: 11/08/2007
• Est. Priority Date: 11/27/2003
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Sung-Young, Park, Dong-Gun, Choe, Jeong-Dong, Oh, Chang-Woo
• Application Number:
  US11/774,240
• Publication Number:
  US 20070257312A1
• Time in Patent Office: Days
• US Class Current: 257/347
• CPC Class Codes: H01L 21/7624 using semiconductor on insulator [SOI] technology H01L21/76297 takes precedence; manufacture of integrated circuits on insulating substrates H01L21/84; silicon on sapphire [SOS] technology H01L21/86
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence

Abstract

An SOI substrate is fabricated by providing a substrate having a sacrificial layer thereon, an active semiconductor layer on the sacrificial layer remote from the substrate and a supporting layer that extends along at least two sides of the active semiconductor layer and the sacrificial layer and onto the substrate, and that exposes at least one side of the sacrificial layer. At least some of the sacrificial layer is etched through the at least one side thereof that is exposed by the supporting layer to form a void space between the substrate and the active semiconductor layer, such that the active semiconductor layer is supported in spaced-apart relation from the substrate by the supporting layer. The void space may be at least partially filled with an insulator lining.

Claims

1. A semiconductor device, comprising:

a semiconductor substrate;

a device isolation layer on the semiconductor substrate; and

an active semiconductor layer spaced apart from the semiconductor substrate with a void space interposed therebetween, supported by the device isolation layer, and having a lattice constant close to that of the semiconductor substrate.

2. The semiconductor device as claimed in claim 1, further comprising a gate electrode within the active layer or on the active layer remote from the semiconductor substrate.

3. The semiconductor device as claimed in claim 2, wherein the gate electrode also extends on a side of the active semiconductor layer.

4. The semiconductor device as claimed in claim 3, wherein the gate electrode covers a surface of the active semiconductor layer remote from the semiconductor substrate.

5. The semiconductor device as claimed in claim 1, further comprising:

an insulating layer on a surface of the substrate facing the active semiconductor layer and on a surface of the active semiconductor layer facing the substrate.

6. The semiconductor device as claimed in claim 1, wherein the semiconductor substrate is a Si substrate, and the active semiconductor layer is a Si epitaxial layer.