Spectrally Efficient Photodiode For Backside Illuminated Sensor

• US 20070262354A1
• Filed: 01/18/2007
• Published: 11/15/2007
• Est. Priority Date: 05/09/2006
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Hsu, Tzu-Hsuan, Yaung, Dun-Nian
• Granted Patent: US 8,704,277 B2
• Time in Patent Office: Days
• US Class Current: 257/228
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14645 Colour imagers

Abstract

A backside illuminated sensor includes a semiconductor substrate having a front surface and a back surface and a plurality of pixels formed on the front surface of the semiconductor substrate. A dielectric layer is disposed above the front surface of the semiconductor substrate. The sensor further includes a plurality of array regions arranged according to the plurality of pixels. At least two of the array regions have a different radiation response characteristic from each other, such as the first array region having a greater junction depth than the second array region, or the first array region having a greater dopant concentration than the second array region.

Claims

1. A backside illuminated sensor, comprising:

a semiconductor substrate having a front surface and a back surface;

a plurality of pixels formed on the front surface of the semiconductor substrate;

a dielectric layer disposed above the front surface of the semiconductor substrate; and

a plurality of array regions arranged according to the plurality of pixels, wherein at least two of the array regions have a different radiation response characteristic from each other.

2. The sensor of claim 1, wherein the first array region has a greater junction depth than the second array region.

3. The sensor of claim 1, wherein the first array region has a greater dopant concentration than the second array region.

4. The sensor of claim 1, wherein the plurality of pixels are of a type to form a CMOS image sensor.

5. The sensor of claim 1, wherein the plurality of pixels are of a type to form a charge-coupled device.

6. The sensor of claim 1, wherein the plurality of pixels are of a type to form an active-pixel sensor.

7. The sensor of claim 1, wherein the plurality of pixels are of a type to form a passive-pixel sensor.

8. The sensor of claim 1, wherein the dielectric layer comprises a low-k material.

9. The sensor of claim 1, wherein the dielectric layer comprises silicon oxide.

10. The sensor of claim 9, wherein the silicon oxide is carbon-doped.

11. The sensor of claim 9, wherein the silicon oxide is fluorine-doped.

12. The sensor of claim 1 further comprising:

a plurality of metal layers over the substrate.

13. A method for forming a backside illuminated sensor, comprising:

providing a semiconductor substrate having a front surface and a back surface;

forming first and second pixels on the front surface of the semiconductor substrate;

forming a first doped region of the substrate, aligned with the first pixel; and

forming a second doped region of the substrate, aligned with the second pixel;

wherein the first and second doped regions are formed to possess a different radiation response characteristic from each other.

14. The method of claim 13, wherein the first doped region has a greater junction depth than the second doped region.

15. The method of claim 13, wherein the first doped region has a greater dopant concentration than the second doped region.

16. The method of claim 13, wherein the plurality of pixels are of a type selected from the group consisting of:

a CMOS image sensor, a charge-coupled device, an active-pixel sensor, and a passive-pixel sensor

17. The method of claim 13, further comprising:

providing a low-k dielectric layer above the front surface of the semiconductor substrate.

18. The method of claim 13, further comprising:

providing a silicon oxide dielectric layer above the front surface of the semiconductor substrate, wherein the dielectric layer comprises silicon oxide doped with either carbon or fluorine.

19. The method of claim 13, further comprising:

forming a third pixel on the front surface of the semiconductor substrate;

forming a third doped region of the substrate, aligned with the third pixel; and

wherein the first, second, and third doped regions are formed to possess a different radiation response characteristic from each other.

20. The method of claim 19, further comprising:

forming a red, green, and blue color filter aligned with the first, second, and third pixels, respectively; and

forming the first, second, and third doped regions so that a uniform spectral response is achieved by the three pixels.