Semiconductor device embedded with pressure sensor and manufacturing method thereof
First Claim
1. A semiconductor device, comprising:
- an electronic circuit having MOS transistors formed on a semiconductor substrate and multilevel wiring layers formed over said semiconductor substrate, and a sensor having a fixed electrode, a diaphragm formed over said fixed electrode and a cavity formed between said fixed electrode and said diaphragm, wherein said fixed electrode of said sensor is formed by using one of said multilevel wiring layers of said electronic circuit, and wherein said diaphragm of said sensor is formed by using a conductive layer upper than said one of said multilevel wiring layers.
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Abstract
The method for promoting the size reduction, the performance improvement and the reliability improvement of a semiconductor device embedded with pressure sensor is provided. In a semiconductor device embedded with pressure sensor, a part of an uppermost wiring is used as a lower electrode of a pressure detecting unit. A part of a silicon oxide film formed on the lower electrode is a cavity. On a tungsten silicide film formed on the silicon oxide film, a silicon nitride film is formed. The silicon nitride film has a function to fill a hole or holes and suppress immersion of moisture from outside to the semiconductor device embedded with pressure sensor. A laminated film of the silicon nitride film and the tungsten silicide film forms a diaphragm of the pressure sensor.
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Citations
7 Claims
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1. A semiconductor device, comprising:
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an electronic circuit having MOS transistors formed on a semiconductor substrate and multilevel wiring layers formed over said semiconductor substrate, and a sensor having a fixed electrode, a diaphragm formed over said fixed electrode and a cavity formed between said fixed electrode and said diaphragm, wherein said fixed electrode of said sensor is formed by using one of said multilevel wiring layers of said electronic circuit, and wherein said diaphragm of said sensor is formed by using a conductive layer upper than said one of said multilevel wiring layers. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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Specification