Protruded contact and insertion of inter-layer-dielectric material to match damascene hardmask to improve undercut for low-k interconnects
First Claim
1. A method of fabrication of an interconnect opening for a semiconductor device;
- comprising the steps of;
forming a lower interconnect and an insulating layer over a semiconductor structure;
a portion of said lower interconnect is exposed;
forming a first hardmask over said lower interconnect and said insulating layer;
forming a dielectric layer over said first hardmask layer;
forming a second hardmask over said dielectric layer;
etching an interconnect opening in said first hardmask, said dielectric layer and said second hardmask layer;
forming an interconnect in said interconnect opening.
3 Assignments
0 Petitions
Accused Products
Abstract
An embodiment of the invention shows a process to form a damascene opening preferably without hardmask overhang or dielectric layer undercut/void. The low-k dielectric material can be sandwiched in two hardmask films to form the dielectric film through which an interconnect opening is etched. A first example embodiment comprises the following. We form a lower interconnect and an insulating layer over a semiconductor structure. We form a first hardmask a dielectric layer, and a second hardmask layer, over the lower interconnect and insulating layer. We etch a first interconnect opening in the first hardmask, the dielectric layer and the second hardmask layer. Lastly, we form an interconnect in the first interconnect opening.
207 Citations
20 Claims
-
1. A method of fabrication of an interconnect opening for a semiconductor device;
- comprising the steps of;
forming a lower interconnect and an insulating layer over a semiconductor structure;
a portion of said lower interconnect is exposed;
forming a first hardmask over said lower interconnect and said insulating layer;
forming a dielectric layer over said first hardmask layer;
forming a second hardmask over said dielectric layer;
etching an interconnect opening in said first hardmask, said dielectric layer and said second hardmask layer;
forming an interconnect in said interconnect opening. - View Dependent Claims (2)
- comprising the steps of;
-
3. A method of fabrication of an interconnect opening for a semiconductor device;
- comprising the steps of;
forming a lower interconnect and an insulating layer over a semiconductor structure;
forming a first hardmask over said lower interconnect and said insulating layer;
forming a dielectric layer over said first hardmask layer;
forming a second hardmask over said dielectric layer;
in a first etch step, etching a first interconnect opening in said first hardmask, said dielectric layer and said second hardmask layer;
the dielectric layer in said first interconnect opening has sidewalls;
the first hardmask has an first hardmask overhang and the second hardmask has a second hardmask overhang where said first hardmask overhang and said second hardmask overhang extend out past the sidewall of the dielectric layer;
in a second etch step, etching the first and second hardmask overhangs and the dielectric layer form a first overhang-less interconnect opening;
the second etch step essentially removes said first and second hardmask overhangs;
forming an interconnect in said first overhang-less interconnect opening. - View Dependent Claims (4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
- comprising the steps of;
-
15. A method of fabrication of an interconnect opening for a semiconductor device;
- comprising the steps of;
a) forming a lower interconnect and insulating layer over a semiconductor structure;
b) forming a first hardmask over said lower interconnect and insulating layer;
(1) said first hardmask is comprised of a material selected from the group consisting of;
oxide, doped oxide or low-temperature oxide;
c) forming a dielectric layer over said first hardmask layer;
(1) said dielectric layer is comprised of a material selected from the group consisting of;
SiCOH, carbon containing low K dielectric, spin on low-k dielectrics, porous silica glass, organo silica glass, aromatic hydrocarbon materials, and CVD ultra-low-k dielectric;
d) forming a second hardmask over said dielectric layer;
(1) said second hardmask is comprised of a material selected from the group consisting of;
oxide, doped oxide or low-temperature oxide;
e) in a first etch step, etching a first interconnect opening in said first hardmask, dielectric layer and said second hardmask layer;
the first hardmask has an first hardmask overhang and the second hardmask has a second hardmask overhang where the first and second hardmask overhangs extend out past the sidewall of the dielectric layer;
the first etch forms a damaged dielectric layer from the dielectric layer lining the first interconnect opening;
(1) the first etch step comprises;
using a carbon-fluorine chemistry;
the first etch step has an etch selectivity between 1;
1 to 2;
1 of the dielectric layer to said first hardmask and said second hardmask;
f) in a second etch step, etching damaged dielectric layer and the overhangs of the hardmask layers to remove said first and second hardmask overhangs and form a first overhang-less interconnect opening and cleaning said first overhand-less interconnect opening;
(1) the second etch comprises an etch with an etch selectivity between the damaged dielectric layer and the hardmask between 1;
1 and 2;
1;
g) forming an interconnect in said first overhang-less interconnect opening. - View Dependent Claims (16, 17, 18, 19, 20)
- comprising the steps of;
Specification