Error Response By a Data Processing System and Peripheral Device

• US 20070266271A1
• Filed: 08/02/2005
• Published: 11/15/2007
• Est. Priority Date: 08/20/2004
• Status: Abandoned Application

• Current Assignee: Koninklijke Philips N.V.
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Frints, Justin
• Application Number:
  US11/573,784
• Publication Number:
  US 20070266271A1
• Time in Patent Office: Days
• US Class Current: 714/44
• CPC Class Codes: G06F 11/0745 in an input/output transactions management context input/output processing in general G06F13/00
• CPC Class Codes: G06F 11/0781 Error filtering or prioritizing based on a policy defined by the user or on a policy defined by a hardware/software module, e.g. according to a severity level
• CPC Class Codes: G06F 11/0787 Storage of error reports, e.g. persistent data storage, storage using memory protection
• CPC Class Codes: G11B 19/04 Arrangements for preventing, inhibiting, or warning against double recording on the same blank or against other recording or reproducing malfunctions
• CPC Class Codes: G11B 20/18 Error detection or correction; Testing , e.g. of drop-outs
• CPC Class Codes: G11B 27/36 Monitoring, i.e. supervising the progress of recording or reproducing for digital recording G11B20/00 and s.gr.; for monitoring, testing or measuring of TV recorders of the type covered by H04N5/76 and subgroups, see H04N17/06

Abstract

In a computer system a peripheral device executes commands that are issued by a main processor. The peripheral device executes the command and detects whether an error occurs during execution of the command. If so, the peripheral device transfers an error response program from the peripheral device (104) to the processor (100) and causes the processor (100) to execute the error response program. When the peripheral device (104) is arranged to provide the processor (100) access to an exchangeable data carrier (26), the peripheral device (104) generates signals that simulate to the processor (100) in response to detection of the error, that a data carrier is inserted in the peripheral device (104). In this case the peripheral device returns the error response program from a program memory (22a) in the peripheral device in response to a read command or commands from the processor (100) to read a program from the simulated data carrier.

Claims

1. A peripheral device (104) for use in a computer system (10) wherein a computer system (10) issues a command to the peripheral device (104) to perform a peripheral operation, the peripheral device (104) comprising

an interface (28) for connection to the computer system;

a program memory (22a) wherein an error response program is stored,

an error response circuit (20) arranged to transfer the error response program to a programmable processor (100) of the computer system via the interface (28), upon detection of an error in the execution of the command, and to cause the programmable processor (100) to execute the error response program.

2. A peripheral device (104) according to claim 1 which is arranged to provide the processor (100) access to an exchangeable data carrier (26), the error response circuit (20) being arranged to generate a signal, of a type that is normally indicative of insertion of a data carrier, to the processor (100) in response to detection of the error, and to return the error response program from the program memory (22a) simulating reading of data from the data carrier in response to a read command or commands from the processor (100) to read a program from the data carrier.

3. A peripheral device according to claim 1, wherein the error response program is arranged to cause the processor (100) to send an error report to a vendor system (14) via a network (12).

4. A peripheral device according to claim 1, wherein the error response circuit (20) is arranged to include information that identifies the error and/or information about a state of the peripheral device (104) when the error occurred with the error response program when the error response program is transferred.

5. A peripheral device according to claim 1, wherein error response circuit (20) is arranged to keep stored information that identifies the error and/or information about a state of the peripheral device (104) when the error occurred in the peripheral device (104), the error response program being arranged, when executed by the processor (100), to cause the processor (100) to read said information from the peripheral device (104).

6. A data processing system (10), comprising a programmable data processor (100) and at least one peripheral device (104) according claim 1, coupled to the programmable processor (100) for performing a peripheral operation upon a command from the programmable processor (100).

7. A method of operating a peripheral device in a computer system (10), the method comprising

sending a command in the computer system to a peripheral device (104);

executing the command in the peripheral device (104);

detecting whether an error occurs during execution of the command, and, if so, in response to detection of the error;

transferring an error response program from the peripheral device (104) to a programmable processor (100) of the computer system (10);

causing the programmable processor (100) to execute the error response program.

8. A method according to claim 7 wherein the peripheral device (104) is arranged to provide the processor (100) access to an exchangeable data carrier (26), the method comprising

generating a signal from the peripheral device (104) to the processor (100) in response to detection of the error, the signal being of a type that is indicative of insertion of a simulated data carrier in the peripheral device (104);

returning the error response program from a program memory (22a) in the peripheral device in response to a read command or commands from the processor (100) to read a program from the simulated data carrier.

9. A method according to claim 7, comprising using the error response program to cause the processor (100) to send an error report to a vendor system (14) via a network (12).

10. A method according to claim 7, comprising including information that identifies the error and/or information about a state of the peripheral device (104) when the error occurred with the error response program when the error response program is transferred.

11. A method according to claim 7 comprising

preserving information that identifies the error and/or information about a state of the peripheral device (104) when the error occurred in the peripheral device (104),

using the error response program to cause the processor (100) to read said information from the peripheral device (104).