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Top layers of metal for high performance IC's

  • US 20070267714A1
  • Filed: 08/02/2007
  • Published: 11/22/2007
  • Est. Priority Date: 12/21/1998
  • Status: Abandoned Application
First Claim
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1. An integrated circuit chip comprising:

  • a silicon substrate;

    multiple devices in and on said silicon substrate;

    a first dielectric layer over said silicon substrate;

    a metallization structure over said first dielectric layer, wherein said metallization structure is connected to said multiple devices, wherein said metallization structure comprises a first metal layer and a second metal layer over said first metal layer, and wherein said metallization structure comprises electroplated copper;

    a second dielectric layer between said first and second metal layers;

    a passivation layer over said metallization structure and over said first and second dielectric layers, a first opening in said passivation layer exposing a pad of said metallization structure; and

    a metal contact over said pad, wherein said metal contact comprises electroless nickel.

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