Ultrasound Transducer and Method for Implementing High Aspect Ration Bumps for Flip-Chip Two Dimensional Arrays
First Claim
Patent Images
1. An ultrasound transducer (100), comprising:
- an integrated circuit (52); and
an array of acoustic elements (92,94,96) coupled to the integrated circuit via flip chip bumps (76,78), wherein the flip chip bumps comprise high aspect ratio bumps having an aspect ratio greater than 1;
1, further wherein the aspect ratio comprises a ratio of a bump height (82) to a bump width (84).
1 Assignment
0 Petitions
Accused Products
Abstract
An ultrasound transducer (100) comprises an integrated circuit (52) and an array of acoustic elements (92,94,96) coupled to the integrated circuit via flip chip bumps (76,78). The flip chip bumps comprise high aspect ratio bumps having an aspect ratio greater than 1:1. The aspect ratio comprises a ratio of a bump height (82) to a bump width (84).
-
Citations
37 Claims
-
1. An ultrasound transducer (100), comprising:
-
an integrated circuit (52); and
an array of acoustic elements (92,94,96) coupled to the integrated circuit via flip chip bumps (76,78), wherein the flip chip bumps comprise high aspect ratio bumps having an aspect ratio greater than 1;
1, further wherein the aspect ratio comprises a ratio of a bump height (82) to a bump width (84). - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
-
-
18. An ultrasound diagnostic imaging system (110) adapted for use with an ultrasound transducer (100), said ultrasound transducer comprising:
-
an integrated circuit (52); and
an array of piezoelectric elements (92,94,96) coupled to the integrated circuit via flip chip bumps (76,78), wherein the flip chip bumps comprise high aspect ratio bumps having an aspect ratio greater than 1;
1, further wherein the aspect ratio comprises a ratio of a bump height (82) to a bump width (84).
-
-
19. A method of fabricating an ultrasound transducer (100), comprising:
-
forming an array of flip chip bumps (76,78) on an integrated circuit (52), the flip chip bumps comprising high aspect ratio bumps having an aspect ratio greater than 1;
1; and
coupling an array of piezoelectric elements (92,94,96) to the integrated circuit via the high aspect ratio bumps. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27)
-
-
28. A semiconductor wafer, comprising:
-
one or more integrated circuit die; and
an array of high aspect ratio flip-chip bumps coupled to a surface of the one or more integrated circuit die, wherein the high aspect ratio of the flip-chip bumps is greater than 1;
1. - View Dependent Claims (29, 30, 31, 32, 33, 34, 35, 36, 37)
-
Specification