Method of wire bonding over active area of a semiconductor circuit
First Claim
1. A circuit component, comprising:
- a semiconductor substrate;
a polymer structure over said semiconductor substrate, wherein said polymer structure has a top surface, a first sidewall and a second sidewall opposite to said first sidewall; and
a metal layer having a first portion on said top surface, a second portion on said first sidewall, and a third portion on said second sidewall, said first portion connecting said second and third portions, wherein said metal layer comprises a titanium-containing layer and a first gold layer on said titanium-containing layer, and wherein said first portion on said top surface is bonded to an external structure.
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Accused Products
Abstract
A method and structure are provided to enable wire bond connections over active and/or passive devices and/or low-k dielectrics, formed on an Integrated Circuit die. A semiconductor substrate having active and/or passive devices is provided, with interconnect metallization formed over the active and/or passive devices. A passivation layer formed over the interconnect metallization is provided, wherein openings are formed in the passivation layer to an upper metal layer of the interconnect metallization. Compliant metal bond pads are formed over the passivation layer, wherein the compliant metal bond pads are connected through the openings to the upper metal layer, and wherein the compliant metal bond pads are formed substantially over the active and/or passive devices. The compliant metal bond pads may be formed of a composite metal structure.
107 Citations
39 Claims
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1. A circuit component, comprising:
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a semiconductor substrate;
a polymer structure over said semiconductor substrate, wherein said polymer structure has a top surface, a first sidewall and a second sidewall opposite to said first sidewall; and
a metal layer having a first portion on said top surface, a second portion on said first sidewall, and a third portion on said second sidewall, said first portion connecting said second and third portions, wherein said metal layer comprises a titanium-containing layer and a first gold layer on said titanium-containing layer, and wherein said first portion on said top surface is bonded to an external structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A circuit component, comprising:
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a semiconductor substrate;
a polymer structure over said semiconductor substrate, wherein said polymer structure has a top surface, a first sidewall and a second sidewall opposite to said first sidewall; and
a metal layer having a first portion on said top surface, a second portion on said first sidewall, and a third portion on said second sidewall, said first portion connecting said second and third portions, wherein said metal layer comprises a first gold layer and a second gold layer on said first gold layer, and wherein said first portion on said top surface is bonded to an external structure. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A circuit component, comprising:
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a semiconductor substrate;
a metal pad over said semiconductor substrate;
a passivation layer over said semiconductor substrate, an opening in said passivation layer exposing said metal pad;
a polymer structure on said passivation layer, wherein said polymer structure has a top surface, a first sidewall and a second sidewall opposite to said first sidewall; and
a metal layer having a first portion on said top surface, a second portion on said first sidewall, and a third portion on said second sidewall, said first portion connecting said second and third portions, wherein said first portion on said top surface is bonded to an external structure. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39)
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Specification