Backages with buried electrical feedthroughs

• US 20070279885A1
• Filed: 05/31/2006
• Published: 12/06/2007
• Est. Priority Date: 05/31/2006
• Status: Abandoned Application

• Current Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Basavanhally, Nagesh R., Jones, Christopher D. W., Ramsey, David Andrew
• Application Number:
  US11/444,860
• Publication Number:
  US 20070279885A1
• Time in Patent Office: Days
• US Class Current: 361/799
• CPC Class Codes: B81B 2207/097 Interconnects arranged on the substrate or the lid, and covered by the package seal
• CPC Class Codes: B81B 7/0051 between the package lid and the substrate
• CPC Class Codes: B81B 7/007 Interconnections between the MEMS and external electrical signals
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: B81C 2203/019 characterised by the material or arrangement of seals between parts
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48228 the bond pad being disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49052 Different loop heights
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/49176 Wire connectors having the same loop shape and height
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01007 : Nitrogen [N]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01018 : Argon [Ar]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/20752 : larger or equal to 20 microns less than 30 microns

Abstract

Apparatus include a substrate having a top surface, a housing having an inner surface, and a joint located between the housing and the substrate. The top and inner surfaces are located to form a cavity between the housing and the substrate. The joint is located to seal the cavity. The apparatus includes a micro-electronic structure that is exposed to the cavity and is located between the substrate and housing. The apparatus also includes a dielectric layer located over the substrate and electrical feedthroughs that traverse the joint and connect to the micro-electronic structure. Portions of the electrical feedthroughs that traverse the joint are located in trenches in the dielectric layer. The electrical feedthroughs have a density along part of the joint of at least 10 per millimeter.

Claims

1. An apparatus, comprising:

a substrate having a top surface;

a housing having an inner surface, the top and inner surfaces being located to form a cavity between the housing and the substrate;

a joint between the top surface and the housing;

a micro-electronic structure being exposed to the cavity and being located between the substrate and housing;

metal electrical feedthroughs traversing the joint and being connected to the micro-electronic structure; and

a dielectric layer located over the substrate, portions of the electrical feedthroughs being located in trenches in the dielectric layer; and

wherein the metal electrical feedthroughs have a density along part of the joint of at least 10 per millimeter.

2. The apparatus of claim 1, wherein the metallic electrical feedthroughs have heights normal to the top surface of at least 0.5 micro-meters.

3. The apparatus of claim 1, the metal electrical feedthroughs have a density along part of the joint of at least 50 per millimeter.

4. The apparatus of claim 2, wherein the joint, housing, and substrate hermetically seal the cavity.

5. The apparatus of claim 4, wherein the micro-electronic structure includes a two-dimension array of optical devices and the housing has a window for passing visible or infrared light through the housing.

6. An apparatus, comprising:

a semiconductor substrate having a top surface;

a housing having an inner surface, the top and inner surfaces being located to form a cavity between the housing and the substrate;

a joint between the top surface of the substrate and the housing;

a micro-electronic structure being exposed to the cavity and being located between the substrate and housing;

electrical feedthroughs traversing the joint and being connected to the micro-electronic structure; and

a dielectric layer located over the substrate, portions of the electrical feedthroughs that traverse the joint being located in trenches in the dielectric layer, the dielectric layer insulating the electrical feedthroughs from the substrate.

7. The apparatus of claim 6, wherein the joint, housing, and substrate hermetically seal the cavity.

8. The apparatus of claim 6, wherein the joint includes a solder joint located between the housing and the dielectric layer.

9. The apparatus of claim 6, wherein the joint comprises:

a portion of a second dielectric layer located over the other dielectric layer; and

wherein the electrical feedthroughs include conducting paths located on the second dielectric layer, the conducting paths being physically connecting by metal-filled vias to the portions of the electrical feedthroughs in the trenches.

10. The apparatus of claim 6, wherein the micro-electronic structure includes a two-dimensional array of MEMS devices, VCSELs, or sensors.

11. The apparatus of claim 6, wherein the micro-electronic structure includes a 2D array of MEMS-controlled optical elements and the housing comprises a window capable of passing infrared or visible light.

12. A method of packaging a micro-electronic structure, comprising:

forming electrical feedthroughs that connect to a micro-electronic structure located over a substrate; and

forming a package by joining a housing to the substrate such that the micro-electronic structure is exposed to a cavity formed between the housing and the substrate; and

wherein the forming of each electrical feedthrough includes depositing conducting material a trench in a dielectric layer, the dielectric layer being located over the substrate; and

wherein the joining includes forming a joint between the housing and the substrate, a portion of each trench traversing the joint.

13. The method of claim 12, wherein the forming electrical feedthroughs produces a density of at least 10 of said feedthroughs per millimeter along part of the joint.

14. The method of claim 13, wherein the formed electrical feedthroughs have heights of at least 0.5 micrometers.

15. The method of claim 12, wherein the forming of each electrical feedthrough includes forming a metallic path over the dielectric layer that electrically connects to the conducting material in one of the trenches;

and

electrically connecting the paths to the electronic structure.

16. The method of claim 12, wherein the joining includes hermetically sealing the cavity.

17. The method of claim 12, further comprising

forming a second dielectric layer over the other dielectric layer and

forming a pattern of metal paths on the second dielectric layer such that each metal path is connected by a metal-filled via to the conducting material in one of the trenches.

18. The method of claim 12, wherein the micro-electronic structure includes a two-dimensional array of MEMS devices, VCSELs, or sensors.

19. The method of claim 12, wherein the micro-electronic structure includes a 2D array of MEMS-controlled optical elements and the housing comprises a window for passing visible or infrared light between the array and a region exterior to the package.

20. The method of claim 12, wherein the step of joining a housing to the substrate includes making a solder joint between the housing and the dielectric layer.