OPTICAL NETWORK TEST ACCESS POINT DEVICE

• US 20070280591A1
• Filed: 06/01/2007
• Published: 12/06/2007
• Est. Priority Date: 06/02/2006
• Status: Active Grant

• Current Assignee: Viavi Solutions, Inc. (Lumentum Holdings Inc.)
• Original Assignee: Finisar Corporation (II-VI Incorporated)
• Inventors: Nelson, Stephen, Light, Greta L.
• Granted Patent: US 7,986,884 B2
• Time in Patent Office: Days
• US Class Current: 385/24
• CPC Class Codes: H04B 10/0795 Performance monitoring; Measurement of transmission parameters

Abstract

An optical network test access point (“TAP”) device. In one example embodiment, an optical network TAP device includes a printed circuit board and a plurality of optical receiver modules. The printed circuit board includes a microprocessor, a multiplexer connected to the microprocessor, and a plurality of post amplifiers connected to the multiplexer. Each optical receiver module includes one or more ROSAs. Each ROSA is connected to the multiplexer through one of the plurality of post amplifiers.

Claims

1. An optical network TAP device comprising:

a printed circuit board comprising;

a microprocessor;

a first multiplexer connected to the microprocessor; and

a plurality of post amplifiers connected to the first multiplexer; and

a plurality of optical receiver modules, each optical receiver module including one or more ROSAs, each ROSA connected to the first multiplexer through one of the plurality of post amplifiers.

2. The optical network TAP device as recited in claim 1, further comprising a TOSA connected to the first multiplexer, the first multiplexer being configured to receive a switching command from the microprocessor, where the switching command specifies at least one of:

connection of one of the ROSAs to the TOSA;

or, disconnection of one of the ROSAs from the TOSA.

3. The optical network TAP device as recited in claim 2, wherein:

each ROSA is connected to one of the plurality of post amplifiers via at least one high-speed channel;

the plurality of post amplifiers are connected to the first multiplexer via at least one high-speed channel;

the TOSA is connected to the first multiplexer via at least one high-speed channel; and

the microprocessor is connected to the first multiplexer via at least one low-speed channel.

4. The optical network TAP device as recited in claim 3, wherein the printed circuit board further comprises a clock and data recovery module positioned along the at least one high-speed channel by which the TOSA is coupled to the first multiplexer.

5. The optical network TAP device as recited in claim 1, wherein the printed circuit board further comprises a second multiplexer connected to the microprocessor and to the plurality of post amplifiers, wherein at microprocessor is configured to deliver control signals to selected post amplifiers through the second multiplexer.

6. The optical network TAP device as recited in claim 1, further comprising an Ethernet port connected to the microprocessor, wherein the microprocessor is configured to receive control signals through the Ethernet port.

7. The optical network TAP device as recited in claim 1, wherein each of the plurality of optical receiver modules substantially complies with at least one of an SFF form factor, an SFP form factor, or an XFP form factor.

9. The optical network TAP device as recited in claim 1, wherein the first multiplexer is configured to receive a switching command from the microprocessor, where the switching command specifies at least one of:

connection of a particular ROSA to a particular TOSA;

or, disconnection of a particular ROSA from a particular TOSA.

10. The optical network TAP device as recited in claim 9, wherein:

each ROSA is connected to one of the post amplifiers via a high-speed channel;

each post amplifiers is connected to the first multiplexer via a high-speed channel;

each TOSA is connected to one of the plurality of laser drivers via a high-speed channel; and

each laser drivers is connected to the first multiplexer via a high-speed channel; and

the microprocessor is connected to the first multiplexer via a low-speed channel.

8. An optical network TAP device comprising:

an optical receiver module comprising two ROSAs;

an optical transmitter module comprising two TOSAs; and

a printed circuit board comprising;

a microprocessor;

two post amplifiers, each post amplifier being connected to one of the ROSAs;

two laser drivers, each laser driver being connected to one of the TOSAs; and

a first multiplexer connected to each of the post amplifiers, to each of the laser drivers, and to the microprocessor.

11. The optical network TAP device as recited in claim 8, wherein the printed circuit board further comprises at least one clock and data recovery module positioned along at least one high-speed channel connecting at least one of the TOSAs to the first multiplexer.

12. The optical network TAP device as recited in claim 8, wherein the printed circuit board further comprises:

a second multiplexer connected to the microprocessor; and

a third multiplexer connected to the microprocessor,

wherein each post amplifier is connected to the second multiplexer and to the third multiplexer.

13. The optical network TAP device as recited in claim 8, further comprising an Ethernet port connected to the microprocessor, wherein the microprocessor is configured to receive control signals through the Ethernet port.

14. The optical network TAP device as recited in claim 8, wherein the at least one optical receiver module and the at least one optical transmitter module substantially comply with at least one of an SFF form factor, an SFP form factor, or an XFP form factor.

15. An optical network TAP device, comprising:

a transceiver module comprising a ROSA and a TOSA;

an optical receiver module comprising two ROSAs; and

a printed circuit board comprising;

a microprocessor;

at least two post amplifiers, each post amplifier connected to one of the ROSAs; and

a first multiplexer connected to each of the post amplifiers and to the microprocessor, the first multiplexer being configured to receive a switching command from the microprocessor, where the switching command specifies at least one of;

connection of a particular ROSA to the TOSA;

or, disconnection of a particular ROSA from the TOSA.

16. The optical network TAP device as recited in claim 15, wherein:

the ROSAs of the optical receiver module are each connected to one of the post amplifiers via at least one high-speed channel;

each post amplifier is connected to the first multiplexer via at least one high-speed channel;

the TOSA is connected to the first multiplexer via at least one high-speed channel; and

the microprocessor is connected to the first multiplexer via at least one low-speed channel.

17. The optical network TAP device as recited in claim 16, wherein the printed circuit board further comprises at least one additional multiplexer connected to each post amplifier and to the microprocessor via at least one low-speed channel.

18. The optical network TAP device as recited in claim 15, wherein the printed circuit board further comprises at least one clock and data recovery module positioned along at least one high-speed channels connecting the TOSA to the first multiplexer.

19. The optical network TAP device as recited in claim 15, further comprising an Ethernet port connected to the microprocessor, wherein the microprocessor is configured to receive control signals through the Ethernet port.

20. The optical network TAP device as recited in claim 15, wherein the optical receiver module and the transceiver module substantially comply with the SFF form factor.