MEMORY ELEMENT, METHOD FOR MANUFACTURING MEMORY ELEMENT, MEMORY DEVICE, ELECTRONIC APPARATUS AND METHOD FOR MANUFACTURING TRANSISTOR

• US 20070281372A1
• Filed: 05/11/2007
• Published: 12/06/2007
• Est. Priority Date: 06/05/2006
• Status: Abandoned Application

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Takiguchi, Hiroshi, Karasawa, Junichi
• Application Number:
  US11/747,653
• Publication Number:
  US 20070281372A1
• Time in Patent Office: Days
• US Class Current: 438/3
• CPC Class Codes: H01L 21/6715 Apparatus for applying a liquid, a resin, an ink or the like H01L21/67126 takes precedence
• CPC Class Codes: H01L 21/68764 characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel
• CPC Class Codes: H01L 28/55 with a dielectric comprising a perovskite structure material
• CPC Class Codes: H01L 29/40111 the electrodes comprising a layer which is used for its ferroelectric properties
• CPC Class Codes: H01L 29/516 with at least one ferroelectric layer
• CPC Class Codes: H01L 29/78391 the gate comprising a layer which is used for its ferroelectric properties
• CPC Class Codes: H10B 51/00 Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors
• CPC Class Codes: H10B 51/30 characterised by the memory core region

Abstract

A method for manufacturing a memory element including forming a first electrode on a first face of a substrate; forming a ferroelectric layer on a second face of the first electrode, the second face being on an opposite side to the substrate side, and the ferroelectric layer being mainly made of a crystalline organic ferroelectric material; and forming a second electrode on a third face of the ferroelectric layer, the third face being on an opposite side to the first electrode side, the second electrode being formed by ejecting an vaporized electrode material in a direction inclined with respect to a normal line direction of the substrate and depositing the vaporized electrode material on the third face of the ferroelectric layer, wherein data writing/reading is performed by changing a polarized state of the ferroelectric layer by applying a voltage between the first electrode and the second electrode.

Claims

1. A method of manufacturing a memory element, comprising:

forming a first electrode over a first face of a substrate;

forming a ferroelectric layer over a second face of the first electrode, the second face being on an opposite side to the substrate side, and the ferroelectric layer including a crystalline organic ferroelectric material; and

forming a second electrode over a third face of the ferroelectric layer, the third face being on an opposite side to the first electrode side, the second electrode being formed by ejecting an vaporized electrode material in a direction inclined with respect to a normal line direction of the substrate and depositing the vaporized electrode material over the third face of the ferroelectric layer.

3. The method of manufacturing a memory element according to claim 1, an angle θ

between the ejecting direction of the vaporized electrode material and the normal line direction of the substrate around the ferroelectric layer being 20-70°

.

4. The method of manufacturing a memory element according to claim 1, the substrate being held by a substrate holder from an opposite side to the first face side in such a way that the substrate is inclined with respect to a material source that ejects the vaporized electrode material while the electrode material is ejected from the material source toward the ferroelectric layer formed over the substrate so as to form the second electrode.

5. The method of manufacturing a memory element according to claim 4, the substrate holder rotating or moving around on an axis that extends in a thickness direction of the substrate which is held by the substrate holder.

6. The method of manufacturing a memory element according to claim 4, the substrate holder holding a plurality of substrates.

7. The method of manufacturing a memory element according to claim 6, the substrate holder holding the plurality of the substrates in a same plane which is orthogonal to the axis of the substrate holder and each of the substrates is placed at a same distance from the axis.

8. The method of manufacturing a memory element according to claim 6, the substrate holder rotating or moving each of the substrates around on an axis line that extends from a center of each substrate in a thickness direction of each substrate.

9. The method of manufacturing a memory element according to claim 4, a slit plate having an opening of a slit shape being interposed between the material source and the substrate, the substrate being moved in a shorter direction of the opening of the slit plate while the vaporized electrode material that goes through the opening of the slit plate is deposited on the substrate so as to form the second electrode.

10. The method of manufacturing a memory element according to claim 1, the forming process of the ferroelectric layer further including forming a low-crystalline film having a lower crystallinity than a crystallinity of the finished ferroelectric layer by applying a liquid material containing the organic ferroelectric material over the first electrode and drying the applied liquid material, and

heating the low-crystalline film so as to increase the crystallinity thereof and to form the ferroelectric layer.

11. The method of manufacturing a memory element according to claim 1, the ferroelectric layer having a rough surface on the face where the second electrode is to be formed, the rough surface being made by crystal grains of the organic ferroelectric material, and the ejecting direction of the vaporized electrode material being slanted with respect to the normal direction of the substrate so as to stop or prevent the electrode material from entering into concave portions of the rough surface.

2. A method of manufacturing a memory element, comprising:

forming a pair of first electrodes with a predetermined space therebetween over a substrate;

forming a semiconductor layer such that the semiconductor layer electrically contacts with both of the first electrodes;

forming a ferroelectric layer over a first face of the semiconductor layer, the first face being on an opposite side to the substrate side, and the ferroelectric layer including a crystalline organic ferroelectric material;

forming a second electrode over a second face of the ferroelectric layer, the second face being on an opposite side to the semiconductor layer side, the second electrode being formed by ejecting an vaporized electrode material in a direction inclined with respect to a normal line direction of the substrate and depositing the vaporized electrode material over the second face of the ferroelectric layer.

12. A method of manufacturing a transistor, comprising

forming a source region and a drain region with a predetermined space therebetween over a substrate;

forming a semiconductor layer such that the semiconductor layer contacts with both the source region and the drain region;

forming a gate insulating layer over a first face of the semiconductor layer, the first face being on an opposite side to the substrate side, and the gate insulating layer including a crystalline organic ferroelectric material; and

forming a gate electrode over a second face of the gate insulating layer, the second face being on an opposite side to the semiconductor layer side, the gate electrode being formed by ejecting an vaporized electrode material in a direction inclined with respect to a normal line direction of the substrate and depositing the vaporized electrode material on the second face of the gate insulating layer.