Integrated Circuit with Debug Support Interface
First Claim
1. An integrated circuit assembly for use in a system, comprising:
- a first arrangement of connection terminals for connecting the integrated circuit to other components of the system;
debug circuitry;
a debug interface comprising a second arrangement of connection terminals;
a signal conversion arrangement coupled to the second arrangement of connection terminals for converting electrical signals provided to the second arrangement of terminals into a format for transmission to external monitoring circuitry; and
a communications link for communicating the data provided to the second arrangement of terminals to the external monitoring circuitry.
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Accused Products
Abstract
A high speed debug support interface has circuits to interface on-chip debug support circuits to a high bandwidth communications port means located on the surface of a system integrated circuit (101) and to on-chip debug support circuits (100). The communication port means can be realised by bonding or integrating special sender and or receiver cells preferably optical sender cells (103) and or optical receiver cells (110) onto the surface of the system integrated circuit (101). The high speed debug support interface communicates with on-chip or in-assembly debug support circuits and an external development tool (108) to permit hardware and software related debugging and development activities, including program tracing, data tracing and memory substitution. The high speed debug support interface has circuits to interface on-chip debug support circuits to system resources such as memory located within the device assembly (102) and connected by the system interconnect.
57 Citations
20 Claims
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1. An integrated circuit assembly for use in a system, comprising:
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a first arrangement of connection terminals for connecting the integrated circuit to other components of the system;
debug circuitry;
a debug interface comprising a second arrangement of connection terminals;
a signal conversion arrangement coupled to the second arrangement of connection terminals for converting electrical signals provided to the second arrangement of terminals into a format for transmission to external monitoring circuitry; and
a communications link for communicating the data provided to the second arrangement of terminals to the external monitoring circuitry. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of performing a debug operation, using an integrated circuit assembly comprising a first arrangement of connection terminals, debug circuitry, and a debug interface comprising a second arrangement of connection terminals, the method comprising:
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coupling a signal conversion arrangement to the second arrangement of connection terminals;
using the signal conversion arrangement to convert electrical signals provided to the second arrangement of terminals into a second format;
transmitting the signals using the second format to external monitoring circuitry; and
performing a debug operation using the external monitoring circuitry. - View Dependent Claims (14, 15, 16, 17)
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18. An integrated circuit assembly for use in a system, comprising:
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a first integrated circuit, comprising;
a first arrangement of connection terminals for connecting the integrated circuit to other components of the system;
debug circuitry;
a debug interface comprising a second arrangement of connection terminals; and
a second integrated circuit memory device, comprising;
a third arrangement of connection terminals connected to the first or second arrangement of connection terminals of the first integrated circuit, wherein the debug interface provides access to internal operation information of the first and second integrated circuits. - View Dependent Claims (19, 20)
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Specification