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STRUCTURE COMPRISING 3-DIMENSIONAL INTEGRATED CIRCUIT ARCHITECTURE, CIRCUIT STRUCTURE, AND INSTRUCTIONS FOR FABRICATION THEREOF

  • US 20070283298A1
  • Filed: 06/26/2007
  • Published: 12/06/2007
  • Est. Priority Date: 03/31/2006
  • Status: Active Grant
First Claim
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1. A design structure instantiated in a machine readable medium for designing, manufacturing, or testing an integrated circuit architecture:

  • the design structure comprising;

    a first array of first memory devices disposed on a first substrate layer, the first memory devices having a first power and performance specification;

    a second array of second memory devices different from the first array disposed on a second substrate layer different from the first substrate layer, the second memory devices having a second power and performance specification different from the first power and performance specification; and

    a plurality of logic devices disposed on a third substrate layer, the plurality of logic devices being coupled to the first array and the second array.

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